Difference between revisions of "OMAP3530"
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| − | + | __TOC__ | |
| − | ''' | + | =Texas Instruments [http://www.ti.com/product/omap3530 OMAP3530]= |
| + | '''[[File:custom_diagram_1_OMAP3530.jpg|center|100%x274px]]''' | ||
| − | '''<u>MPU Subsystem</u>''' | + | '''<u>MPU Subsystem</u>''' |
| − | *Up to 720-MHz [http://www.arm.com/ ARM] [http://www.arm.com/products/processors/cortex-a/cortex-a8.php Cortex™-A8 Core] ARMv7 Architecture. | + | * [http://downloads.isee.biz/pub/documentation/OMAP3/OMAP3530%20and%20OMAP3525%20Applications%20Processors%20datasheet%20(Rev.%20H).pdf OMAP3530] Up to 720-MHz [http://www.arm.com/ ARM] [http://www.arm.com/products/processors/cortex-a/cortex-a8.php Cortex™-A8 Core] ARMv7 Architecture. |
| − | *In-Order, Dual-Issue, Superscalar Microprocessor Core. | + | * In-Order, Dual-Issue, Superscalar Microprocessor Core. |
| − | *[http://www.arm.com/products/processors/technologies/neon.php NEON™ SIMD Coprocessor] | + | * [http://www.arm.com/products/processors/technologies/neon.php NEON™ SIMD Coprocessor] |
| − | <u>'''High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem.'''</u> | + | <u>'''High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem.'''</u> |
| − | *520-MHz [http:// | + | * 520-MHz [http://downloads.isee.biz/pub/documentation/OMAP3/TMS320C64x+%20DSP%20Megamodule.pdf TMS320C64x+™ DSP Core] |
| − | *Enhanced Direct Memory Access (EDMA) Controller (128 Independent Channels) | + | * Enhanced Direct Memory Access (EDMA) Controller (128 Independent Channels) |
| − | *Video Hardware Accelerators | + | * Video Hardware Accelerators |
| − | <u>'''POWERVR SGX™ Graphics Accelerator'''</u> (SGX530 Imagination Technologies) | + | <u>'''POWERVR SGX™ Graphics Accelerator'''</u> (SGX530 [http://www.imgtec.com/ Imagination Technologies]) |
| − | *Tile Based Architecture delivering 10 MPoly/sec | + | * Tile Based Architecture delivering 10 MPoly/sec |
| − | *Universal Scalable Shader Engine: Multi-threaded Engine Incorporating Pixel and Vertex Shader Functionality | + | * Universal Scalable Shader Engine: Multi-threaded Engine Incorporating Pixel and Vertex Shader Functionality |
| − | *Industry Standard API Support: OpenGLES 1.1 and 2.0, OpenVG1.0 | + | * Industry Standard API Support: [http://www.khronos.org/opengles/1_X/ OpenGLES 1.1] and [http://www.khronos.org/opengles/2_X/ 2.0], [http://www.khronos.org/openvg/ OpenVG1.0] |
| − | *Fine Grained Task Switching, Load Balancing, and Power Management | + | * Fine Grained Task Switching, Load Balancing, and Power Management |
| − | *Programmable High Quality Image Anti-Aliasing | + | * Programmable High Quality Image Anti-Aliasing |
| − | <u>'''Fully Software-Compatible With C64x and ARM9™'''</u> | + | <u>'''Fully Software-Compatible With C64x and ARM9™'''</u> |
| − | <u>'''Commercial and Extended Temperature Grades'''</u> | + | <u>'''Commercial and Extended Temperature Grades'''</u> |
| − | <u>'''Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core'''</u> | + | <u>'''Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core'''</u> |
| − | *Eight Highly Independent Functional Units | + | * Eight Highly Independent Functional Units |
[[Image:OMAP3530 bloques.jpg|center]] | [[Image:OMAP3530 bloques.jpg|center]] | ||
| + | |||
| + | ==Documentation== | ||
| + | * [http://downloads.isee.biz/pub/documentation/OMAP3/OMAP3530%20and%20OMAP3525%20Applications%20Processors%20datasheet%20(Rev.%20H).pdf OMAP3530 and OMAP3525 Applications Processors datasheet (Rev. H).] | ||
| + | * [http://downloads.isee.biz/pub/documentation/OMAP3/OMAP35x%20Technical%20Reference%20Manual%20(Rev.%20Y).pdf OMAP35x Technical Reference Manual (Rev. Y).pdf] | ||
| + | * [http://downloads.isee.biz/pub/documentation/OMAP3/OMAP35x%20Peripherals%20Overview%20Reference%20Guide%20(Rev.%20A).pdf OMAP35x Peripherals Overview Reference Guide (Rev. A)] | ||
| + | * [http://downloads.isee.biz/pub/documentation/OMAP3/SYS:BIOS%20(TI-RTOS%20Kernel)%20User's%20Guide%20(Rev.%20T).pdf SYS:BIOS (TI-RTOS Kernel) User's Guide (Rev. T)] | ||
| + | * [http://downloads.isee.biz/pub/documentation/OMAP3/TMS320C64x+%20DSP%20Megamodule.pdf TMS320C64x+ DSP Megamodule] | ||
| + | * [http://downloads.isee.biz/pub/documentation/OMAP3/TMS320C64x-C64x+DSP%20CPU%20and%20Instruction%20set.pdf TMS320C64x-C64x+DSP CPU and Instruction set] | ||
| + | |||
| + | ==See also== | ||
| + | * [[TPS65950]] | ||
| + | * [[DM3730]] | ||
| + | * [[IGEPv2]] | ||
| + | |||
| + | [[Category:IGEPv2]] | ||
| + | [[Category:IGEP0030]] | ||
| + | [[Category:TPS65950]] | ||
| + | [[Category:OMAP3]] | ||
| + | [[Category:DM3730]] | ||
Latest revision as of 16:27, 27 February 2018
Texas Instruments OMAP3530
MPU Subsystem
- OMAP3530 Up to 720-MHz ARM Cortex™-A8 Core ARMv7 Architecture.
- In-Order, Dual-Issue, Superscalar Microprocessor Core.
- NEON™ SIMD Coprocessor
High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem.
- 520-MHz TMS320C64x+™ DSP Core
- Enhanced Direct Memory Access (EDMA) Controller (128 Independent Channels)
- Video Hardware Accelerators
POWERVR SGX™ Graphics Accelerator (SGX530 Imagination Technologies)
- Tile Based Architecture delivering 10 MPoly/sec
- Universal Scalable Shader Engine: Multi-threaded Engine Incorporating Pixel and Vertex Shader Functionality
- Industry Standard API Support: OpenGLES 1.1 and 2.0, OpenVG1.0
- Fine Grained Task Switching, Load Balancing, and Power Management
- Programmable High Quality Image Anti-Aliasing
Fully Software-Compatible With C64x and ARM9™
Commercial and Extended Temperature Grades
Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
- Eight Highly Independent Functional Units
Documentation
- OMAP3530 and OMAP3525 Applications Processors datasheet (Rev. H).
- OMAP35x Technical Reference Manual (Rev. Y).pdf
- OMAP35x Peripherals Overview Reference Guide (Rev. A)
- SYS:BIOS (TI-RTOS Kernel) User's Guide (Rev. T)
- TMS320C64x+ DSP Megamodule
- TMS320C64x-C64x+DSP CPU and Instruction set
