From IGEP - ISEE Wiki

Jump to: navigation, search

Texas Instruments OMAP3530


MPU Subsystem

High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem.

  • 520-MHz TMS320C64x+™ DSP Core
  • Enhanced Direct Memory Access (EDMA) Controller (128 Independent Channels)
  • Video Hardware Accelerators

POWERVR SGX™ Graphics Accelerator (SGX530 Imagination Technologies)

  • Tile Based Architecture delivering 10 MPoly/sec
  • Universal Scalable Shader Engine: Multi-threaded Engine Incorporating Pixel and Vertex Shader Functionality
  • Industry Standard API Support: OpenGLES 1.1 and 2.0, OpenVG1.0
  • Fine Grained Task Switching, Load Balancing, and Power Management
  • Programmable High Quality Image Anti-Aliasing

Fully Software-Compatible With C64x and ARM9™

Commercial and Extended Temperature Grades

Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core

  • Eight Highly Independent Functional Units
OMAP3530 bloques.jpg


See also