4,199
edits
Changes
From IGEP - ISEE Wiki
no edit summary
Table information:
*'''Pad''' number. See PCB.<br>
*"'''Connect to'''" is a name used in schematics, usually it will be default peripheral name (mode=0)
*IGEP '''main peripheral'''
=== J990 connector ===
Using this expansion connector you have access to McBSP1, McBSP3, I2C2, MMC2(8 bits), nReset and REGEN signals from OMAP Processor. The interface is at 1.8V on all signals. Only 1.8V CMOS levels are supported. DO NOT expose the header to 3.3V.<br>J990 connector is [http://beagleboard.org/ BeagleBoard] compatible expansion connector.<br>IGEPv2-NOWIFI board is fully compatible. Other IGEPv2 board versions need software configuration to disable wifi interface and others because of shared hardware lines.<br>MMC2 interface is used by wifi module.<br>McBSP3 interface is used by PCM TPS65950 interface.<br>
See which versions have WIFI/BT combo is [[Frequently Asked Questions and Their Answers#Which_revision_is_my_IGEPv2_board.3F|available]].
| Pad
| Connect to
| Main peripheral | Main utility<br>
| Other available peripherals
| Share with
| 3
| MMC2_DAT7
| GPIO_139(mode=4)
| Reset WIFI
|
MMC2_DAT7(mode=0) <br>MMC2_CLKIN(mode=1) <br>MMC3_DAT3(mode=3)<br>
| WIFI/BT combo:WIFI
|-
| 5
| MMC2_DAT6
| GPIO_138(mode=4)
| Power down WIFI
|
MMC2_DAT6(mode=0) <br>MMC2_DIR_CMD(mode=1) <br>MMC3_DAT2(mode=3)<br>
| WIFI/BT combo:WIFI
| 7
| MMC2_DAT5
| GPIO_137(mode=4)<br>
| Reset BT
|
MMC2_DAT5(mode=0) <br>MMC2_DIR_DAT1(mode=1) <br>MMC3_DAT1(mode=3)<br>
| WIFI/BT combo:BT
| 9
| MMC2_DAT4
| GPIO136(mode=4)
| -
|
MMC2_DAT4(mode=0) <br>MMC_DIR_DAT0(mode=1) <br>MMC3_DAT0(mode=3)<br>
| WIFI/BT combo:WIFI
| MMC2_DAT3
| MMC2_DAT3(mode=0)
| Transfer data<br>
|
McSPI3_CS0(mode=1) <br>GPIO_135(mode=4)
| WIFI/BT combo:WIFI
| MMC2_DAT2
| MMC2_DAT2(mode=0)
| Transfer data <br>
|
McSPI3_CS1(mode=1) <br>GPIO_134(mode=4)
| WIFI/BT combo:WIFI
| MMC2_DAT0
| MMC2_DAT0(mode=0)
| Transfer data <br>
|
McSPI3_SOMI(mode=1) <br>GPIO_132(mode=4)
| WIFI/BT combo:WIFI
| Control Wire for bus MMC2 (WIFI)
|
McSPI3_SIMO(mode=1) <br>GPIO_131(mode=4)
| WIFI/BT combo:WIFI
| Clock for MMC2 (WIFI)
|
McSPI3_CLK(mode=1) <br>GPIO_130(mode=4)
| WIFI/BT combo:WIFI
| Transmitted serial Data (BT audio)
|
UART2_CTS(mode=1) <br>GPIO_140(mode=4)
|
| Transmitted serial Clock (BT audio)
|
UART2_TX(mode=1) <br>GPIO_142(mode=4)
| BT/TPS65950: PCM VSP
| Transmited Frame Syncronisation (BT audio)
|
UART2_RX(mode=1) <br>GPIO_143(mode=4)
| BT/TPS65950: PCM VSP
| Received Serial Data (BT audio)
|
UART2_RTS(mode=1) <br>GPIO_141(mode=4)
| TPS65950: PCM VSP
| 12
| MCBSP1_DX
| GPIO_158(mode=4)
| -
|
MCBSP1_DX <br>McSPI4_SIMO(mode=1) <br>McBSP3_DX(mode=2)<br>
| -
| 14
| MCBSP1_CLKX
| GPIO_162(mode=4)
| -
|
MCBSP1_CLKX <br>McBSP3_CLKX(mode=2)<br>
| -
| 16
| MCBSP1_FSX
| GPIO_161(mode=4)
| -
|
MCBSP1_FSX <br>McSPI4_CS0(mode=1) <br>McBSP3_FSX(mode=2)<br>
| -
| 18
| MCBSP1_DR
| GPIO_161(mode=4)
| -
|
MCBSP1_DR <br>McSPI4_SOMI(mode=1) <br>McBSP3_DR(mode=2) <br>
| -
| 20
| MCBSP1_CLKR
| GPIO_156(mode=4)
| -
| MCBSP1_CLKR
| -
|-
| 22
| MCBSP1_FSR
| GPIO_157(mode=4)
| -
| MCBSP1_FSR<br>
| -
|-
| I2C2_SDA(mode=0)
| I2C Data
| GPIO_183(mode=4)
| CAM if configured via hardware: RC14
|-
| I2C2_SCL(mode=0)
| I2C Clock
| GPIO_168(mode=4)
| CAM if configured via hardware: RC13
|-
| -
|}
<br>
| -
| -
| -<br>
| -
| -
| RS232_RX2
| UART3_RX(R966)
| Serial debug<br> | UART2_RX(R952) only RC<br>
| SN65C3232EPW
|-
| RS232_TX2
| UART3_TX(R965)
| Serial debug<br> | UART2_TX(R947) only RC<br>
| SN65C3232EPW
|-
| -
| -
| -<br>
| -
| -
| -
| -
| -<br>
| -
| -
| UART1_TX(R961)
| SN65C3232EPW
| UART3_TX(R940) only RC<br>
| SN65C3232EPW
|-
| UART1_RX(R962)
| SN65C3232EPW
| UART3_RX(R942) only RC<br>
| SN65C3232EPW
|-
| -
| -
| -<br>
| -
| -
|}
<br>
=== J940 connector ===
This connector is used mainly to connect via RS485 (UART1) with other devices. User can use this connector to power the board with 5VDC. Use only 5V regulated DC.<br>The IGEPv2 BOARD does not use this 9v power supply. Only on IGEPv2 revision B, the PWR_9V input is directly routed to JC01 and J971 connectors. On IGEPv2 revision C is not available.<br>
{| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 104px;"
| PWR_GND
| GND
| -<br>
| -
| -
| 2
| PWR_5V
| Power 5v<br> | -<br>
| -
| -
| 3
| PWR_9V
| Power 9v<br> | -<br>
| -
| -
| TXS0102DCUR
|}
<br>
=== J400 connector ===
J400 is used to [http://en.wikipedia.org/wiki/Jtag JTAG] (Joint Test Action Group). JTAG is a standardized serial protocol widely used in printed circuit boards. Its main functions are:<br>
*Debug the software of an embedded system directly
*Storing firmware
*Boundary scan testing<br>
JTAG Suggested:
| 1
| JTAG_TMS
| JTAG_TMS<br> | <br>
| -
| -
| 2
| JTAG_NTRST
| JTAG_NTRST<br> | <br>
| -
| -
| 3
| JTAG_TDI
| JTAG_TDI<br> | <br>
| -
| -
| GND
| -
| -<br>
|-
| 5
| 1V8
| Power 1V8<br> | <br>
| -
| -<br>
|-
| 6
| -
| -
| <br>
| -
| -
| 7
| JTAG_TD0
| JTAG_TD0<br> | <br>
| -
| -
| 9
| JTAG_RTCK
| JTAG_RTCK<br> | <br>
| -
| -
| 11
| JTAG_TCK
| JTAG_TCK<br> | <br>
| -
| -
| 13
| JTAG_EMU0
| JTAG_EMU0(mode=0)<br> | <br>
| GPIO_11(mode=4)
| -
| 14
| JTAG_EMU1
| JTAG_EMU1(mode=0)<br> | <br>
| GPIO_31(mode=4)
| -
|}
<br>
=== J970 connector ===
J970 is used to implement a keypad, it is connected to TPS65950. The keypad interface controller provides an enhanced keypad decode capability and simultaneously reduces host processor software overhead. When a key button of the keyboard matrix is pressed the corresponding row and column lines are shorted together. To allow key press detection, all input pins (KBR) are pulled up to VCC and all output pins (KBC) driven to a low level.<br>Any action on a button generates an interrupt to the sequencer.<br>The decoding sequence is written to allow detection of simultaneous press actions on several key buttons.
More information in [http://www.ti.com/product/tps65950 TPS65950] datasheets. TPS65950 send via I2C1 all the interrupt request. <br>
{| cellspacing="1" cellpadding="1" border="1" style="width: 698px; height: 216px;"
| -
|}
<br>
=== JC30 connector ===
These connectors allow the access to the Camera interface signals. Omap have the processing capability to connect RAW image-sensor modules via this connector. Next table shows the signals that are on the JC30 connector.<br>
{| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 104px;"
| -
|}
<br>
=== TFT CONNECTORS: JA41-JA42 ===
These connectors allow the access to the LCD signals.The output signal is shared by HDMI-A<br>
==== JA41 connector ====
| Pad:
| Connect to
| Main peripheral<br>| Main utility<br>
| Other available peripherals
| Share with
| 2
| GND
| -
| GND
| -
| -
|-
| DVI_DATA0
| DSS_D0(mode=0)
| LCD pixel data bit<br>
|
UART1_CTS(mode=2)<br>GPIO_70(mode=4)
| TXS0102DCUR
|}
<br>
TFP410: converts DVI signal to HDMI
TXS0102DCUR: Increse I2c3 voltage to 5V to read EDID information <br>
==== JA42 connector ====
JA42 is used for DVI (Digital Video Interface) control part, TouchScreen control and SPI1.<br>
The current available on the DC_5V rail is limited to the available current that remains from the DC supply that is connected to the DC power jack on the board. Keep in mind that some of that power is needed by the USB Host power rail and if more power is needed for the expansion board, the main DC power supply current capability may need to be increased. All signals are 1.8V except the DVI_PUP which is a 3.3V signal. The 1.8V rail is for level translation only and should not be used to power circuitry on the board. The 3.3V rail also has limited capacity on the power as well. It is suggested that the 5V rail be used to generate the required voltages for an adapter card. The next table show JA42 connector information:<br>
{| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 804px; height: 343px;"
| Connect to
| Main peripheral
| Main utility<br>
| Other available peripherals
| Share with
|}
<br> TFP410: converts DVI signal to HDMI
== IGEP MODULE ==
