Difference between revisions of "IMX6 Solo"

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'''<u>CPU Complex</u>'''
 
'''<u>CPU Complex</u>'''
  
::* 1x [http://www.arm.com/ ARM] [https://developer.arm.com/products/processors/cortex-a/cortex-a9 Cortex-A9] up to 1 GHz
+
* 1x [http://www.arm.com/ ARM] [https://developer.arm.com/products/processors/cortex-a/cortex-a9 Cortex-A9] up to 1 GHz
::* [https://developer.arm.com/technologies/neon NEON SIMD media accelerator]
+
* [https://developer.arm.com/technologies/neon NEON SIMD media accelerator]
  
 
<u>'''Memory'''</u>
 
<u>'''Memory'''</u>
  
<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">DDR
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<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true">
* 32 bit LP-DDR3/LV-DDR3
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* DDR
 
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** 32 bit LP-DDR3/LV-DDR3
NAND
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* NAND
 
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** SLC/MLC, 40-bit ECC, ONFI2.2, DDR
* SLC/MLC, 40-bit ECC, ONFI2.2, DDR
 
  
</div>
 
 
</div>
 
</div>
 
<u>'''Advanced power management'''</u>
 
<u>'''Advanced power management'''</u>
  
<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"><div class="toggle_container">PMU integration </div>
+
<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne">
[https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
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* PMU integration 
 +
* [https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
  
 +
<u>'''Package and temperature'''</u>
  
 +
<div id="panel8" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">
 +
* 21 x 21 mm 0.8 mm BGA
 +
* Consumer (0C to +95C), up to 1 GHz
 +
* Industrial (-40C to +105C), up to 800 MHz
 +
* Automotive (-40C to +125C), AEC-Q100, up to 800 MHz GHz
  
<div class="toggle_container"></div>
 
 
</div>
 
</div>
==<u>Block diagram</u>==
+
</div>
 +
<div id="panel8" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"></div>
 +
</div>
 +
==Block diagram==
 
<div style="padding-left: 150px;">[[File:Screenshot-2018-4-4_i_MX_6Solo_6DualLite_Applications_Processors_for_Consumer_Products_Data_Sheet_-_IMX6SDLCEC_pdf.png|563x439px]]</div>
 
<div style="padding-left: 150px;">[[File:Screenshot-2018-4-4_i_MX_6Solo_6DualLite_Applications_Processors_for_Consumer_Products_Data_Sheet_-_IMX6SDLCEC_pdf.png|563x439px]]</div>
 
==Documentation==
 
==Documentation==
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* [https://www.nxp.com/docs/en/fact-sheet/IMX6SRSFS.pdf i.MX 6 Series of Applications Processors Fact Sheet]
 
* [https://www.nxp.com/docs/en/fact-sheet/IMX6SRSFS.pdf i.MX 6 Series of Applications Processors Fact Sheet]
 
* [https://www.nxp.com/docs/en/reference-manual/IMX6SDLRM.pdf i.MX 6Solo/6DualLite Applications Processor Reference Manual]
 
* [https://www.nxp.com/docs/en/reference-manual/IMX6SDLRM.pdf i.MX 6Solo/6DualLite Applications Processor Reference Manual]
* [https://www.nxp.com/docs/en/engineering-bulletin/EB821.pdf LDB Clock Switch Procedure & i.MX6 Asynchronous Clock Switching Guidelines]
 
  
 
==See also==
 
==See also==
* Dual Lite
+
* [[IMX6 Dual Lite|Dual Lite]]
* Dual
+
* [[IMX6 Dual|Dual]]
* Quad
+
* [[IMX6 Quad|Quad]]
 +
* [https://www.nxp.com/video/:IMX6SERIES_VID i.MX 6 User Experience - Breaking Boundaries - Use Case]

Latest revision as of 12:00, 4 April 2018

NXP i.MX6 Solo

IMX6Solo Diagrama.jpg

CPU Complex

Memory

  • DDR
    • 32 bit LP-DDR3/LV-DDR3
  • NAND
    • SLC/MLC, 40-bit ECC, ONFI2.2, DDR

Advanced power management

Package and temperature

  • 21 x 21 mm 0.8 mm BGA
  • Consumer (0C to +95C), up to 1 GHz
  • Industrial (-40C to +105C), up to 800 MHz
  • Automotive (-40C to +125C), AEC-Q100, up to 800 MHz GHz

Block diagram

Screenshot-2018-4-4 i MX 6Solo 6DualLite Applications Processors for Consumer Products Data Sheet - IMX6SDLCEC pdf.png

Documentation

See also