OMAP3530
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Texas Instruments OMAP3530
MPU Subsystem
- OMAP3530 Up to 720-MHz ARM Cortex™-A8 Core ARMv7 Architecture.
- In-Order, Dual-Issue, Superscalar Microprocessor Core.
- NEON™ SIMD Coprocessor
High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem.
- 520-MHz TMS320C64x+™ DSP Core
- Enhanced Direct Memory Access (EDMA) Controller (128 Independent Channels)
- Video Hardware Accelerators
POWERVR SGX™ Graphics Accelerator (SGX530 Imagination Technologies)
- Tile Based Architecture delivering 10 MPoly/sec
- Universal Scalable Shader Engine: Multi-threaded Engine Incorporating Pixel and Vertex Shader Functionality
- Industry Standard API Support: OpenGLES 1.1 and 2.0, OpenVG1.0
- Fine Grained Task Switching, Load Balancing, and Power Management
- Programmable High Quality Image Anti-Aliasing
Fully Software-Compatible With C64x and ARM9™
Commercial and Extended Temperature Grades
Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
- Eight Highly Independent Functional Units
Documentation
- OMAP3530 and OMAP3525 Applications Processors datasheet (Rev. H).
- OMAP35x Technical Reference Manual (Rev. Y).pdf
- OMAP35x Peripherals Overview Reference Guide (Rev. A)
- SYS:BIOS (TI-RTOS Kernel) User's Guide (Rev. T)
- TMS320C64x+ DSP Megamodule
- TMS320C64x-C64x+DSP CPU and Instruction set
