Difference between revisions of "Mux configuration"
From IGEP - ISEE Wiki
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• '''Wake-up''' bits (2 bits): | • '''Wake-up''' bits (2 bits): | ||
− | ->WAKEUPENABLE: Enable wake-up detection on input. It is also the off mode input enable value.<br> ->WAKEUPEVENT: Wake-up event status for the pin.'''<br>''' | + | ->WAKEUPENABLE: Enable wake-up detection on input. It is also the off mode input enable value.<br> ->WAKEUPEVENT: Wake-up event status for the pin.'''<br>''' |
{| cellspacing="1" cellpadding="1" border="1" align="center" width="200" | {| cellspacing="1" cellpadding="1" border="1" align="center" width="200" | ||
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'''Mode 1 to mode 6''' are possible modes for alternate functions. On each pin, some modes are used effectively for alternate functions, while other modes are unused and correspond to no functional configuration. | '''Mode 1 to mode 6''' are possible modes for alternate functions. On each pin, some modes are used effectively for alternate functions, while other modes are unused and correspond to no functional configuration. | ||
− | '''The safe mode (default mode 7) '''avoids any risk of electrical contention by configuring the pin as an input with no functional interface mapped to it. '''The safe mode is used mainly as the default mode for all pins containing no mandatory interface at the release of power-on reset.'''<br> | + | '''The safe mode (default mode 7) '''avoids any risk of electrical contention by configuring the pin as an input with no functional interface mapped to it. '''The safe mode is used mainly as the default mode for all pins containing no mandatory interface at the release of power-on reset.'''<br> |
=== Pull Selection === | === Pull Selection === | ||
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INPUTENABLE = 1: Input Enable. Pin is configured in bidirectional mode. | INPUTENABLE = 1: Input Enable. Pin is configured in bidirectional mode. | ||
− | NOTE: For proper functioning of some peripherals INPUTENABLE must be set to 1 for pads configured to drive output clocks: SDRC, GPMC, McSPIi, I2Ci, MMCi, McBSPi, HSUSB HOST. | + | NOTE: For proper functioning of some peripherals INPUTENABLE must be set to 1 for pads configured to drive output clocks: SDRC, GPMC, McSPIi, I2Ci, MMCi, McBSPi, HSUSB HOST. |
=== '''Off mode values''' and '''Wake-up''' === | === '''Off mode values''' and '''Wake-up''' === | ||
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Please contribute. | Please contribute. | ||
+ | |||
+ | [http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=spruf98v&fileType=pdf More information] about mux. | ||
+ | |||
+ | = Available peripherals on external connector = | ||
+ | |||
+ | Use the next tables to change mux configuration as you need. First column shows all avaliable peripherals and first row shows all avaliable connectors. There are some connectors than have more peripherals, but they don't have all pads avaliable to use it. For example: MMC3 in J990. | ||
=== Important tips<br> === | === Important tips<br> === | ||
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*Editing OS User Space. this mode has a issue, when your system reboot or shutdown you will need to configure again. [[How to set up UART2 in J990#First_way|Example]]. | *Editing OS User Space. this mode has a issue, when your system reboot or shutdown you will need to configure again. [[How to set up UART2 in J990#First_way|Example]]. | ||
*Using kernel buddies. This way is not avaliable in some cases. [[How to set up UART2 in J990#Second_way|Example]]. [[Linux Kernel 2.6.37.y#Kernel_Parameters|Buddies examples]].<br> | *Using kernel buddies. This way is not avaliable in some cases. [[How to set up UART2 in J990#Second_way|Example]]. [[Linux Kernel 2.6.37.y#Kernel_Parameters|Buddies examples]].<br> | ||
− | *Editing and compile kernel sources. [[How to set up UART2 in J990#Third_way|Example]] | + | *Editing and compile kernel sources. [[How to set up UART2 in J990#Third_way|Example]]. |
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=== IGEPv2<br> === | === IGEPv2<br> === |
Revision as of 10:25, 2 February 2012
Contents
Overview
This How-To is meant to be a starting point for people to learn configure mux for IGEP devices as quickly and easily as possible. For this how-to i used Linaro Headless and Ubuntu 10.04 with Linaro Toolchain.
Mux (or multiplexer) is a Omap peripheral that can be controlled via software. Its function is connect other peripherals to some available Omap pins.
Each pin is configurable by software using its associated pad configuration register field, which is 16 bits wide:
One pad configuration register field is available for each pin. Each 32-bit pad configuration register is grouped into two 16-bit pad configuration register fields. One pad configuration register provides control for two different pins. These registers can be accessed using 8, 16 and 32 bits operations.
The functional bits of a pad configuration register field are divided into the following five fields:
• MUXMODE (3 bits) defines the multiplexing mode applied to the pin. A mode corresponds to the selection of the functionality mapped on the pin with six (0 to 5) possible functional modes for each pin.
• PULL (2 bits) for combinational pullup/pulldown configuration:
-> PULLTYPESELECT: Pullup/pulldown selection for the pin.
-> PULLUDENABLE: Pullup/pulldown enable for the pin.
• INPUTENABLE (1 bit) drives an input enable signal to the I/O CTRL.
• Off mode values (5 bits) override the pin state when the OFFENABLE bit CONTROL. This feature is used for power saving management. Pins in off mode can be configured like output with HIGH or LOW value or input with wake-up detection feature. For input pins, OFFOUTENABLE and OFFOUTVALUE bits can not be configured:
->OFFENABLE: Off mode pin state override control. Set to 1 to enable the feature and to 0 to disable it.
->OFFOUTENABLE: Off mode output enable value. Set to 0 to enable the feature and to 1 to disable it.
->OFFOUTVALUE: Off mode output value.
->OFFPULLUDENABLE: Off mode pullup/pulldown enable.
->OFFPULLTYPESELECT: Off mode pullup/pulldown selection.
• Wake-up bits (2 bits):
->WAKEUPENABLE: Enable wake-up detection on input. It is also the off mode input enable value.
->WAKEUPEVENT: Wake-up event status for the pin.
Mode selection
MUXMODE | Select Mode |
0b000=0 | Mode 0 (Primary mode) |
0b001=1 | Mode 1 (Possible mode) |
0b010=2 | Mode 2 (Possible mode) |
0b011=3 | Mode 3 (Possible mode) |
0b100=4 | Mode 4 (Possible mode) |
0b101=5 | Mode 5 (Possible mode) |
0b110=6 | Mode 6 (Possible mode) |
0b111=7 | Mode 7 (Safe Mode) |
Mode 0 is the primary mode. When mode 0 is set, the function mapped to the pin corresponds to the name of the pin. In IGEP some pads don't use primary mode by default.
Mode 1 to mode 6 are possible modes for alternate functions. On each pin, some modes are used effectively for alternate functions, while other modes are unused and correspond to no functional configuration.
The safe mode (default mode 7) avoids any risk of electrical contention by configuring the pin as an input with no functional interface mapped to it. The safe mode is used mainly as the default mode for all pins containing no mandatory interface at the release of power-on reset.
Pull Selection
Note: when a pin is in output mode, pulls are automatically disable.
PULLTYPESELECT | PULLUDENABLE | Pin Behavior |
0b0 | 0b0 | Pull-down selected but not activated |
0b0 | 0b1 | Pull-down selected and activated if pin is NOT configured as OUTPUT |
0b1 | 0b0 | Pull-up selected but not activated |
0b1 | 0b1 | Pull-up selected and activated if pin is NOT configured as OUTPUT |
Input Enable
INPUTENABLE = 0: Input Disable. Pin is configured in output only mode.
INPUTENABLE = 1: Input Enable. Pin is configured in bidirectional mode.
NOTE: For proper functioning of some peripherals INPUTENABLE must be set to 1 for pads configured to drive output clocks: SDRC, GPMC, McSPIi, I2Ci, MMCi, McBSPi, HSUSB HOST.
Off mode values and Wake-up
This mode is used to disable some pins and reduce power consumption.
Please contribute.
More information about mux.
Available peripherals on external connector
Use the next tables to change mux configuration as you need. First column shows all avaliable peripherals and first row shows all avaliable connectors. There are some connectors than have more peripherals, but they don't have all pads avaliable to use it. For example: MMC3 in J990.
Important tips
Use the following tips to configure mux without problems:
- Mux can connect multiple connectors at the same peripheral, this improper use can damage the processor. Make sure to disable old connector configuration before use new one.
- Some peripherals are only available if you place or replace some resistances. View schematics for more information.
- Some connectors share multiples peripherals. You should disable unused peripherals to avoid interferences. For example: if you want to control WIFI module via J990 disable OMAP or if you want use UART2 at j990 disable Bluetooth.
Configure mux
IgepV2 Board has a default mux configuration, but some cases are necessary change it, for example your project needs UART2 at j990 connector to transmit data. Mux options are vast. There are three ways to configure mux at DM37xx and OMAP35xx:
- Editing OS User Space. this mode has a issue, when your system reboot or shutdown you will need to configure again. Example.
- Using kernel buddies. This way is not avaliable in some cases. Example. Buddies examples.
- Editing and compile kernel sources. Example.
IGEPv2
|
J990 | J960 | J970 | J400 | JC30 | JA42 | JA41 | TP |
UART1 | No | Yes: disable RS485 | No | No | No | No | No | No |
UART2 | Yes: disable BT |
Yes: via hardware, |
No | No | No | No | No | No |
UART3 | No | Yes: default | No | No | No | No | No | No |
UART4 | No | No | No | No | No | No | No | No |
GPIO | Yes: not default |
No | No | Yes: not default | Yes: default | Yes: not default | Yes: not default |
Yes |
McSPI1 | No |
No | No | No | No | Yes: default |
No | No |
McSPI2 | No |
No | No | No | No | No | No | No |
McSPI3 |
Yes: dissable WIFI |
No | No | No | No | No | No | No |
McSPI4 | Yes: disable McBSP1 |
No | No | No | No | No | No | No |
McBSP1 | Yes: default | No | No | No | No | No | No | No |
McBSP2 | No | No | No | No | No | No | No | No |
McBSP3 | Yes: BT audio | No | No | No | No | No | No | No |
McBSP4 | No | No | No | No | No | Yes: default |
No | No |
McBSP5 | No | No | No | No | No | No | No | No |
MMC1 | No | No | No | No | No | No | No | No |
MMC2 | Yes: WIFI | No | No | No | No | No | No | No |
MMC3 | No | No | No | No | No | No | No | No |
I2C1 | No | No | No | No | No | No | No | No |
I2C2 | Yes: default | No | No | No | Yes: via hardware |
No | No | No |
I2C3 | No | No | No | No | No | No | Yes: shared with DVI |
No |
I2C4 | No | No | No | No | No | No | No | No |
Under construction