Difference between revisions of "Mux configuration"

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<br> One pad configuration register field is available for each pin. Each 32-bit pad configuration register is grouped into two 16-bit pad configuration register fields. One pad configuration register provides control for two different pins. These registers can be accessed using 8, 16 and 32 bits operations.<br>  
 
<br> One pad configuration register field is available for each pin. Each 32-bit pad configuration register is grouped into two 16-bit pad configuration register fields. One pad configuration register provides control for two different pins. These registers can be accessed using 8, 16 and 32 bits operations.<br>  
  
−
The functional bits of a pad configuration register field are divided into the following five fields: • MUXMODE (3 bits) defines the multiplexing mode applied to the pin. A mode corresponds to the selection of the functionality mapped on the pin with six (0 to 5) possible functional modes for each pin. • PULL (2 bits) for combinational pullup/pulldown configuration:  
+
The functional bits of a pad configuration register field are divided into the following five fields:
  
−
– PULLTYPESELECT: Pullup/pulldown selection for the pin.
+
-> MUXMODE (3 bits) defines the multiplexing mode applied to the pin. A mode corresponds to the selection of the functionality mapped on the pin with six (0 to 5) possible functional modes for each pin.
−
  – PULLUDENABLE: Pullup/pulldown enable for the pin.
 
  
−
• INPUTENABLE (1 bit) drives an input enable signal to the I/O CTRL.
+
-> PULL (2 bits) for combinational pullup/pulldown configuration:
  
−
  – INPUTENABLE = 0: Input Disable. Pin is configured in output only mode.
+
- PULLTYPESELECT: Pullup/pulldown selection for the pin.  
−
  – INPUTENABLE = 1: Input Enable. Pin is configured in bidirectional mode.
+
- PULLUDENABLE: Pullup/pulldown enable for the pin.
  
−
• Off mode values (5 bits) override the pin state when the OFFENABLE bit CONTROL.  
+
-> INPUTENABLE (1 bit) drives an input enable signal to the I/O CTRL.
 +
 
 +
- INPUTENABLE = 0: Input Disable. Pin is configured in output only mode.
 +
- INPUTENABLE = 1: Input Enable. Pin is configured in bidirectional mode.
 +
 
 +
-> Off mode values (5 bits) override the pin state when the OFFENABLE bit CONTROL.  
  
 
   CONTROL_PADCONF_X is set and off mode is active. This feature allows having separate configurations for the pins when in off mode:
 
   CONTROL_PADCONF_X is set and off mode is active. This feature allows having separate configurations for the pins when in off mode:

Revision as of 18:00, 27 January 2012

Overview

Mux (or multiplexer) is a Omap peripheral that can be controlled via software. Its function is connect other peripherals to some available Omap pins.

Each pin is configurable by software using its associated pad configuration register field, which is 16 bits wide:

Mux register.png


One pad configuration register field is available for each pin. Each 32-bit pad configuration register is grouped into two 16-bit pad configuration register fields. One pad configuration register provides control for two different pins. These registers can be accessed using 8, 16 and 32 bits operations.

The functional bits of a pad configuration register field are divided into the following five fields:

-> MUXMODE (3 bits) defines the multiplexing mode applied to the pin. A mode corresponds to the selection of the functionality mapped on the pin with six (0 to 5) possible functional modes for each pin.

-> PULL (2 bits) for combinational pullup/pulldown configuration:

- PULLTYPESELECT: Pullup/pulldown selection for the pin. - PULLUDENABLE: Pullup/pulldown enable for the pin.

-> INPUTENABLE (1 bit) drives an input enable signal to the I/O CTRL.

- INPUTENABLE = 0: Input Disable. Pin is configured in output only mode. - INPUTENABLE = 1: Input Enable. Pin is configured in bidirectional mode.

-> Off mode values (5 bits) override the pin state when the OFFENABLE bit CONTROL. 

  CONTROL_PADCONF_X is set and off mode is active. This feature allows having separate configurations for the pins when in off mode:
  – OFFENABLE: Off mode pin state override control. Set to 1 to enable the feature and to 0 to disable it.
  – OFFOUTENABLE: Off mode output enable value. Set to 0 to enable the feature and to 1 to disable it.
  – OFFOUTVALUE: Off mode output value.
  – OFFPULLUDENABLE: Off mode pullup/pulldown enable
  – OFFPULLTYPESELECT: Off mode pullup/pulldown selection




(more information)


IgepV2 Board have a default mux configuration, but some cases is necessary change it, for example your project need UART2 at j990 connector to transmit data, for this purpose you need change some mux configurations to enable it and be sure that this modification don't break or interferes in other IC or peripherals. The mux options are vast.

This How-To is meant to be a starting point for people to learn configure mux for IGEP v2 devices as quickly and easily as possible. For this how-to i used Linaro Headless and Ubuntu 10.04 with Linaro Toolchain.

Feedback and Contributing

At any point, if you see a mistake you can contribute to this How-To.

Available peripherals on external connector

Before configure mux is necessary review some things:

- If connector is shared with other peripherals you should disable it via software or hardware.
- Don't use the same peripheral in more than one pad.
- Omap mux have 8 modes, somes modes are disable in some pads.

The next tables show you all the mux capabilities:

J990 connector

-There are some peripherals than can be connected to J990 like mm3 and camera, but is not used in this how-to.

-High Speed USB 3 is only available on Omap 3530 in the next pads:

     3: HSUSB3_TLL_NXT
     4: HSUSB3_TLL_D4
     5: HSUSB3_TLL_DIR
     6: HSUSB3_TLL_D6
     7: HSUSB3_TLL_STP
     8: HSUSB3_TLL_D7
     10: HSUSB3_TLL_D5


Pad: Connect to:

Default peripheral (mode=0)

Default function: Other available peripherals: Share with:
1 VIO 1V8 - Power 1v8 - -
2 DC 5V - Power 5v - -
3 MMC2_DAT7 MMC2_DAT7 Reset Wlan

MMC2_CLKIN(mode=1)

MMC3_DAT3(mode=3)

GPIO_139(mode=4)

Wlan: This pad can reset Wlan peripheral using Omap GPIO low level (GND). If you reset continuously Wlan all their pads are in High Impedance. Also you can disable Wlan from J990 low level.
Omap: protect Omap pad if you don't use it.(1)
5 MMC2_DAT6 MMC2_DAT6 Power down  Wlan

MMC2_DIR_CMD(mode=1)

MMC3_DAT2(mode=3)

GPIO_138(mode=4)

Wlan: This pad can power down Wlan peripheral using Omap GPIO low level (GND), power up removing GND. Also you can power down Wlan from J990 low level.
Omap: protect Omap pad if you don't use it.(1)
7 MMC2_DAT5 MMC2_DAT5 Reset Bluethoot

MMC2_DIR_DAT1(mode=1)

MMC3_DAT1(mode=3)

GPIO_137(mode=4)

Bluethoot: This pad can reset Bluethoot

peripheral using Omap GPIO low level (GND). If you reset continuously Bluethoot all their pads are in High Impedance. Also you can disable Bluethoot from J990 low level.Omap: protect Omap pad if you don't use it.(1)

9 MMC2_DAT4 MMC2_DAT4 -

MMC_DIR_DAT0(mode=1)

MMC3_DAT0(mode=3)

GPIO136(mode=4)

Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
11 MMC2_DAT3 MMC2_DAT3 Transfer data between Omap and Wlan

McSPI3_CS0(mode=1)

GPIO_135(mode=4)

Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
13 MMC2_DAT2 MMC2_DAT2 Transfer data between Omap and Wlan

McSPI3_CS1(mode=1)

GPIO_134(mode=4)

Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
15 MMC2_DAT1 MMC2_DAT1 Transfer data between Omap and Wlan  GPIO_133(mode=4)
Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
17 MMC2_DAT0 MMC2_DAT0 Transfer data between Omap and Wlan

McSPI3_SOMI(mode=1)

GPIO_132(mode=4)

Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
19 MMC2_CMD MMC2_CMD Control Wire for bus MMC2 (Wlan)

McSPI3_SIMO(mode=1)

GPIO_131(mode=4)

Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
21 MMC2_CLK0 MMC2_CLK Clock for MMC2 (Wlan)

McSPI3_CLK(mode=1)

GPIO_130(mode=4)

Wlan: Protect Wlan if you don' use it. See MMC2_DAT7 pad.
Omap: protect Omap pad if you don't use it.(1)
4 MCBSP3_DX MCBSP3_DX Transmitted serial Data (Bluethoot audio)

UART2_CTS(mode=1)

GPIO_140(mode=4)

TPS65950: disable it via kernel (2) If you don't use it.
6 MCBSP3_CLKX MCBSP3_CLKX Transmitted serial Clock (Bluethoot audio)

UART2_TX(mode=1)

GPIO_142(mode=4)

Bluethoot: Protect Bluethoot if you don' use it. See MMC2_DAT5 pad.

TPS65950: disable it via kernel (2) If you don't use it.
8 MCBSP3_FSX MCBSP3_FSX Transmited Frame Syncronisation (Bluethoot audio)

UART2_RX(mode=1)

GPIO_143(mode=4)

Bluethoot: Protect Bluethoot if you don' use it. See MMC2_DAT5 pad.

TPS65950: disable it via kernel (2) If you don't use it.
10 MCBSP3_DR MCBSP3_DR Received Serial Data (Bluethoot audio)

UART2_RTS(mode=1)

GPIO_141(mode=4)

TPS65950: disable it via kernel (2) If you don't use it.
12 MCBSP1_DX MCBSP1_DX Transmited serial Data (not used)

McSPI4_SIMO(mode=1)

McBSP3_DX(mode=2)

GPIO_158(mode=4)

-
14 MCBSP1_CLKX MCBSP1_CLKX Transmited serial clock (not used)

McBSP3_CLKX(mode=2)

GPIO_162(mode=4)

-
16 MCBSP1_FSX MCBSP1_FSX Transmited Frame Syncronization (not used)

McSPI4_CS0(mode=1)

McBSP3_FSX(mode=2)

GPIO_161(mode=4)

-
18 MCBSP1_DR MCBSP1_DR Received Serial Data (not used)

McSPI4_SOMI(mode=1)

McBSP3_DR(mode=2)

GPIO_159(mode=4)

-
20 MCBSP1_CLKR MCBSP1_CLKR Received Clock (not used)

GPIO_156(mode=4)

 -
22 MCBSP1_FSR MCBSP1_FSR Received frame syncronization (not used)

GPIO_157(mode=4)

 -
23 I2C2_SDA I2C2_SDA I2C Data

GPIO_183(mode=4)
Cam connector: Check and RC14 is not welded or don't use it.
24 I2C2_SCL I2C2_SCL I2C Clock

GPIO_168(mode=4)

 Cam connector: Check and RC13 is not welded or don't use it.
25 REGEN - Master/Slave control power TPS65950
 - -
26 nRESET - Read Reset Omap - -
27 GND - GND - -
28 GND - GND - -

(1): To protect Omap pads from external signals, configure Mux in mode=7 (safe_mode). With this mode, buffer is configured in high impedance

(2): Disable TPS65950 go to file sound/soc/codecs/twl4030.c change line 54 Code: 

0x00, /* REG_VOICE_IF (0xF) */

to Code: 

0x04, /* REG_VOICE_IF (0xF) */

J960 connector

J960 connector can not use mux capabilities, because this connector is dedicated to use RS232 comunication. Default hardware/software configuration is:

Pad Connect to: Default periphera: Other peripheral: Share with:
 Default function:
1 - - - -
2 RS232_RX2 UART3_RX UART2_RX -
 Kernel console params(4)
3 RS232_TX2 UART3_TX UART2_TX -
 Kernel console params(4)
4 - - - -
 -
5 GND - - -
 -
6 GND - - -
 -
7 - - - -
 -
8 RS232_TX1 UART1_TX UART3_TX RS485 interface(5)
 -
9 RS232_RX1 UART1_RX UART3_RX RS485 interface(5)
 -
10 - - - -
 -


- Other peripherals can be configured via hardware, placing/replacing some resistances. See IGEPv2 Schematic for more information.

(4): To set other functionalities to UART3 (/dev/ttyS2) edit igep.ini file:

Search line: 

console=ttyS2,115200n8

Replace by: 

; console=ttyS2,115200n8

(5): Allows to use UART1 as RS232 instead of EI485, edit igep.ini:

Search line: 

board.ei485=yes

Replace by: 

board.ei485=no

J400 connector

J400 is used to JTAG (Joint Test Action Group). JTAG is a standardized serial protocol widely used in printed circuit boards. Its main functions are:

-Debug the software of an embedded system directly
-Storing firmware
-Boundary scan testing

More information: http://es.wikipedia.org/wiki/JTAG.

Only Pad 13 and 14 have mux capabilities, for example you can use them like GPIO(mode=4). More information in IGEPv2 Schematic.

J970 connector

This connector don't have mux capabilities.

J970 is used to implement a keypad. It is controlled by TPS65950, this method avoid reduce Omap proces capabilities. TPS65950 send via I2C1 all the interrupt request. Their characteristics are:

- Can handle up to 8 x 8 keypads, IGEPv2 can handle up to 4 x 4 keypads.
- Optionally, you can decode via Omap software.
- Event detection on key press and key release.
- Multikey press detection, can detect up 2  keys at the same time.
- Long-key detection on prolonged key press.
- Programmable time-out on permanent key press or after keypad release.

More information in TPS65950 datasheets.

JC30 connector

JC30 is used to connect a camera for capture video or image. Omap have the processing capability to connect RAW image-sensor modules via this connector.

There are some peripherals than can be connected to JC30 like like CAM, SSI and CSI, but is not used in this how-to. GPIO are the default peripheral.

Before use this connector be careful at these points:

- Pad 1 can be used to power down wifi module if RD41 is short circuit, replace RD42 for this porpouse.
- Pad 2 can be used to reset wifi module if RD43 is short circuit, replace RD44 for this porpouse.
- Pad 21 can be connected to I2C2_SCL, that wire is shared with J990 connector and I2C2_SCL peripheral. Placing/replacing RC13 for tis porpouse.
- Pad 22 can be connected to I2C2_SDA, that wire is shared with J990 connector and I2C2_SDA peripheral. Placing/replacing RC14 for tis porpouse.

JA42 connector

JA42 is used for DVI (Digital Video Interface) control part, TouchScreen control and SPI1.

-There are some peripherals than can be connected to JA42 like MM3, MM2, SSI, USB and HW_DBG, but is not used in this how-to.

Some pads have mux capabilities:

Pad: Connect to:

Default peripheral (mode=0)

Default function: Other available peripherals: Share with:
1 VIO 1V8 - Power 1v8 - -
2 SYS_BOOT5

SYS_BOOT5

 Omap boot config

MMC2_DIR_DAT(mode=1)

GPIO_7 (mode=4)

-
3 DC_5V - Power 5v -
-
4 GND - GND -

-
5 SYS_BOOT0

SYS_BOOT0

 Omap boot config

GPIO_2 (mode=4)


-

6 SYS_BOOT1

SYS_BOOT1

 Omap boot config

GPIO_3 (mode=4)

-

7 DVI_VSYNC DSS_VSYNC LCD vertical sync (Expansion)

GPIO_68(mode=4)


TFP410 (6)
8 DVI_HSYNC DSS_HSYNC LCD Horitzontal sync (Expansion)

GPIO_67 (mode=4)

TFP410 (6)
9 DVI_ACBIAS DSS_ACBIAS LCD Control (Expansion)   GPIO_133(mode=4)

TFP410 (6)
10 DVI_PUP - Control signal for DVI controler (Expansion) -

TFP410 (6)
11 DVI_PCLK DSS_PCLK LCD clock (Expansion)

GPIO_66 (mode=4)

TFP410 (6)
12 TS_nPEN_IRQ McSPI1_CS1 Touchscreen control (Expansion)

MMC3_CMD(mode=3)

GPIO_175 (mode=4)

-

13 LCD_QVGA/nVGA McBSP4_DX Touchscreen control (Expansion)

GPIO_154 (mode=4)
-
14 LCD_ENVDD McBSP4_DR Touchscreen control (Expansion)

GPIO_153 (mode=4)

 -
15 LCD_RESB McBSP4_FSX Touchscreen control (Expansion)

GPIO_155 (mode=4)

-

16 LCD_INI McBSP4_CLKX Touchscreen control (Expansion)

GPIO_152 (mode=4)
-
17 MCSPI1_CLK

McSPI1_CLK

 Touchscreen control (Expansion)

GPIO_171 (mode=4)

-
18 MCSPI1_SIMO McSPI1_SIMO Touchscreen control (Expansion)

GPIO_172 (mode=4)

-
19 MCSPI1_CS0 McSPI1_CS0 Touchscreen control (Expansion)

GPIO_174 (mode=4)

-
20 MCSPI1_SOMI McSPI1_SOMI Touchscreen control (Expansion)

GPIO_173 (mode=4)

-


(6): TFP410: Converts DVI signal to HDMI. They share the same video signal.

JA41 connector

JA41 is used for DVI (Digital Video Interface) data part.

-There are some peripherals than can be connected to JA41 like DSSVENC, HW, DSS and SDI, but is not used in this how-to.

Some pads have mux capabilities:

Pad: Connect to:

Default peripheral (mode=0)

Default function: Other available peripherals: Share with:
1 VIO 3V3 - Power 3v3 - -
2 GND

-

 GND

-

 -
3 DVI_DATA0   DSS_D0 LCD pixel data bit

UART1_CTS(mode=2)

GPIO_70(mode=4)

TFP410 (6)
4 DVI_DATA1   DSS_D1 LCD pixel data bit

UART1_RTS(mode=2)

GPIO_71(mode=4)


TFP410 (6)
5 DVI_DATA2

 DSS_D2

LCD pixel data bit

GPIO_72(mode=4)

TFP410 (6)
6 DVI_DATA3

DSS_D3

LCD pixel data bit

GPIO_73(mode=4)

TFP410 (6)

7 DVI_DATA4  DSS_D4 LCD pixel data bit

UART3_RX(mode=2)

GPIO_74(mode=4)

TFP410 (6)

8 DVI_DATA5 DSS_D5 LCD pixel data bit

UART3_TX(mode=2)

GPIO_75(mode=4)
TFP410 (6)

9 DVI_DATA6 DSS_D6 LCD pixel data bit

 UART1_TX(mode=2)

GPIO_76(mode=4)

TFP410 (6)

10 DVI_DATA7 DSS_D7 LCD pixel data bit

  UART1_RX(mode=2)

GPIO_77(mode=4)


TFP410 (6)
11 DVI_DATA8 DSS_D8 LCD pixel data bit

GPIO_78(mode=4)

TFP410 (6)
12 DVI_DATA9 DSS_D9 LCD pixel data bit

GPIO_79(mode=4)

TFP410 (6)

13 DVI_DATA10 DSS_D10 LCD pixel data bit

GPIO_80(mode=4)
TFP410 (6)
14 DVI_DATA11 DSS_D11 LCD pixel data bit

GPIO_81(mode=4)

 TFP410 (6)
15 DVI_DATA12 DSS_D12 LCD pixel data bit

GPIO_82(mode=4)

TFP410 (6)

16 DVI_DATA13 DSS_D13 LCD pixel data bit

GPIO_83(mode=4)
TFP410 (6)
17 DVI_DATA14

DSS_D14

LCD pixel data bit

GPIO_84(mode=4)

TFP410 (6)
18 DVI_DATA15 DSS_D15 LCD pixel data bit

GPIO_85(mode=4)

TFP410 (6)
19 DVI_DATA16 DSS_D16 LCD pixel data bit

GPIO_86(mode=4)

TFP410 (6)
20 DVI_DATA17 DSS_D17 LCD pixel data bit

GPIO_87(mode=4)

TFP410 (6)
21
 DVI_DATA18 DSS_D18 LCD pixel data bit

DSS_D0 (mode=3)

MCSPI3_CLK(mode=2)

GPIO_88(mode=4)

TFP410 (6)
22
 DVI_DATA19 DSS_D19 LCD pixel data bit

DSS_1 (mode=3)

MCSPI3_SIMO(mode=2)

GPIO_89(mode=4)

TFP410 (6)
23
 DVI_DATA20 DSS_D20 LCD pixel data bit

DSS_D2 (mode=3)

MCSPI3_SOMI(mode=2)

GPIO_90(mode=4)

TFP410 (6)
24
 DVI_DATA21 DSS_D21 LCD pixel data bit

DSS_3 (mode=3)

MCSPI3_CSO(mode=2)

GPIO_91(mode=4)

TFP410 (6)
25
 DVI_DATA22
 DSS_D22
 LCD pixel data bit

DSS_D4 (mode=3)

MCSPI3_CS1(mode=2)

GPIO_92(mode=4)

TFP410 (6)
26
 DVI_DATA23
 DSS_D23
 LCD pixel data bit

DSS_D5(mode=3)

GPIO_93(mode=4)

TFP410 (6)
27
 I2C3_SCL
 I2C3_SCL I2C3 interface

GPIO_184(mode=4)

TXS0102DCUR
28
 I2C3_SDA
 I2C3_SDA I2C3 interface

GPIO_185(mode=4)

TXS0102DCUR


(6): TFP410: Converts DVI signal to HDMI. They share the same video signal.

Under construction

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