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= Getting started with IGEP COM AQUILA =
{{Table/IGEP Technology Devices
|Tech_Family={{#lst:Template:Links|IGEP_COM_AQUILA_Tech_Family}}
|Tech_ID={{#lst:Template:Links|IGEP_COM_AQUILA_Tech_ID}}
|Name={{#lst:Template:Links|IGEP_COM_AQUILA_Name}}
|Image={{#lst:Template:Links|IGEP_COM_AQUILA_Image}}
|ISEE_MainPage={{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_MainPage}}
|ISEE_Hardware={{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_Hardware}}
}}
{{Message/Work in progress}}
= Overview =
This is the 1/3 chapter of the Getting Started with IGEP COM AQUILA Tutorial Guide.
This first chapter helps to develop a baseboard that lets us expand the IGEP COM AQUILA functionalities.
Upon completion, you will be ready to continue with chapter 2/3 that explains how to use templates, tools and other methods to help us create a custom Linux-based system for your project.
__TOC__
= Resources =
== Main Resources ==
In this tutorial, we are going to use some resources available into [{{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_MainPage}} IGEP COM AQUILA MainPage] and [{{#lst:Template:Links|IGEP_AQUILA_EXPANSION_ISEE_MainPage}} IGEP AQUILA EXPANSION MainPage].
* [{{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_Hardware}} IGEP COM AQUILA Hardware Reference Manual]
* [{{#lst:Template:Links|IGEP_AQUILA_EXPANSION_ISEE_Hardware}} IGEP AQUILA EXPANSION Hardware Reference Manual]
* [{{#lst:Template:Links|IGEP_AQUILA_EXPANSION_ISEE_Schematic}} IGEP AQUILA EXPANSION Public Schematics]
== Other resources ==
Other interesting resources available can be obtained at:
* [http://www.ti.com/lsds/ti/arm/sitara_arm_cortex_a_processor/sitara_arm_cortex_a8/am335x_arm_cortex_a8/getting_started.page?DCMP=AM33x_Announcement&HQS=am335x TI AM335x Main Page]
* [http://www.ti.com/product/tps65910a3 TI TPS65910A3 Main Page]
= Brew introduction to IGEP COM AQUILA =
The IGEP COM AQUILA (IGEP0033-RBxx) is an industrial processor module with 256 MB RAM plus 128 MB FLASH, it is based in ARM Cortex-A8 AM335x CPU up to 1GHz with SODIMM form factor size. The next diagram shows its capabilities:
{| cellspacing="1" cellpadding="1" width="150" border="1" align="center"
|-
| [[Image:Block Diagram IGEP0033-RBxx.png|500px|Block diagram from IGEP0033]]<br>
|}
Mechanical from IGEP0033:<br><br>
{| cellspacing="1" cellpadding="1" width="150" border="1" align="center"
|-
| [[Image:MEC-IGEP0033RAXX-T.png|500px|TOP side]]<br>
| [[Image:MEC-IGEP0033RAXX-B.png|500px|BOT side]]<br>
|}
= Getting started =
One of the most interesting parts about IGEP COM AQUILA Board is the versatility that offers to baseboard designers to implement their own specific solution. But this versatility represents too an obstacle to start developing a baseboard.
To resolve this initial obstacle, this guide does an abstract about every single part, each part is classified by:
* Power, system boot and resets
* Peripherals
= Power, system boot and resets =
This part can be helpful to power up and power down the full system correctly.
== Power sources ==
=== Input Power sources ===
*'''VIN''' is the main voltage regulator that generates all the necessary internal voltages to IGEP COM AQUILA. VIN source needs 5V, read the design rules to determine the maximum current load applied.
*'''VBACKUP''' is RTC backup power supply used to keep alive the hardware clock.
=== Output Power sources ===
*'''VOUT''' is a linear regulator that offers 3V3 and 1A
*'''VREFP_ADC''' is a supply voltage used for analog digital converters.
=== Power sources design rules ===
* IGEP COM AQUILA uses a TPS73701, this LDO converts 5V (VIN input) to 3V3 (VOUT output), so you can use the following formula to calculate the maximum VIN current consumption: Ivin (maximum supply current) = 550 mA (IGEP COM AQUILA Internal maximum current) + Ivout (maximum output current).
* Read the resources detailed above to get more information.
== System boot ==
=== BOOTMODE pin ===
*'''BOOTMODE''' is used to setup a boot priority sequence. BOOTMODE is equal to #SYS_BOOT4. It has a 100K PU signal.
=== BOOTMODE design rules ===
* It is recommendable add a jumper header series with a 100 Ohms resistor in your base board to manage boot priority sequence. For example: If you want to reflash the internal NAND memory from microSD card you will need to unmount the jumper.
* Read the resources detailed above to get more information.
== Resets ==
=== PMIC Resets ===
*'''PMIC_PWR_BTN''': Drive to Low to turn off power supply (long press). Also, this pin can generate interrupts to AM335x from PMIC (short press).
=== AM335x Resets ===
*'''#RESET_OUT''' this pin is used to reset IC from IGEP COM AQUILA like LAN8720, it is managed by AM335x.
*'''#POR''' (Power on Reset) is a cold Reset used during AM335x power-up and power-down sequence, it is managed by PMIC.
*'''#RESET_IN'''is a warm Reset (also named fast reset).
=== Resets design rules===
* Resets lines are very useful to restart ICs (LDOs, Transceivers, Level shifters, etc.).
* The most priority reset is PMIC_PWR_BTN, so it is important to use at least this one.
* Read the resources detailed above to get more information.
= AM335x peripherals=
This part can be helpful to expand correctly the AM335x peripherals. AM335x peripherals are expanded through SODIMM200 connector. Each SODIMM peripheral is classified by:
*'''Dedicated lines''': These lines were designed to work with a specific functionality. Change its functionality its not possible or recommended.
*'''Optional lines''': These lines were designed to work with different functionalities. Select a functionality is controlled by AM335x MUX. Mux options are vast, at the beginning can be difficult and tedious change some configurations. Before configure mux, use the following tips to avoid problems:
**Mux can connect multiple connectors at the same peripheral, this improper use can damage the processor. Before configure mux, revise that this peripheral is not used in other pads in your design. Read each peripheral chapter to implement your desing and use the resources available above to revise your implementation.
**Some peripherals are only available if you place or replace some resistances into IGEP COM AQUILA. See [{{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_Hardware}} IGEP COM AQUILA Hardware Reference Manual] to get more information.
**Some pads share internal peripherals. See [{{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_Hardware}} IGEP COM AQUILA Hardware Reference Manual] to get more information.
**Some pads share an AM335x pad. See [{{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_Hardware}} IGEP COM AQUILA Hardware Reference Manual] to get more information
Finally, the second part of this manual we are going to configure software to change MUX configuration properly.
== Ethernet ==
=== Dedicated Ethernet ===
IGEP COM AQUILA uses LAN8720 Transceiver to add Ethernet communication. IGEP AQUILA EXPANSION Public Schematics adapts SODIMM lines for a RJ-45 connector.
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| ETN_TXN
| 19
| -
|-
| #ETN_LED2
| 20
| -
|-
| ETN_TXP
| 21
| -
|-
| ETN_3V3
| 22
| -
|-
| ETN_RXN
| 23
| -
|-
| #ETN_LED1
| 24
| -
|-
| ETN_RXP
| 25
| -
|}
=== Ethernet design rules===
* For Ethernet data lines: TX (ETN_TXN (19) and ETN_TXP(21)) and RX (ETN_RXN (23) and ETN_RXP(25))
**Maintain symmetry and isolate differential pairs from nearby signals and circuitry to mantain the signal integrity.
== USBs ==
=== Dedicated USB Host ===
IGEP COM AQUILA uses USB1 peripheral as USB 2.0 Host. IGEP AQUILA EXPANSION Public Schematics adapts SODIMM lines for an USB Type A receptacle.
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| USBH_VBUSEN
| 27
| F15
|-
| #USBH_OC
| 28
| R13
|-
| USBH_DM
| 29
| R18
|-
| USBH_VBUS
| 30
| T18
|-
| USBH_DP
| 31
| R17
|}
=== Dedicated USB OTG ===
IGEP COM AQUILA uses USB0 peripheral as USB 2.0 OTG. IGEP AQUILA EXPANSION Public Schematics adapts SODIMM lines for an USB Type mini AB receptacle.
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| USBOTG_ID
| 33
| P16
|-
| USBOTG_VBUSEN
| 34
| F16
|-
| USBOTG_DM
| 35
| N18
|-
| #USBOTG_OC
| 36
| V17
|-
| USBOTG_DP
| 37
| N17
|-
| USBOTG_VBUS
| 38
| P15
|}
=== USB design rules===
* For USB data lines: USB1 (USBH_DM (29) and USBH_DP (31)) and USB0 (USBOTG_DM (35) and USBOTG_DP (37))
**Maintain symmetry and isolate differential pairs from nearby signals and circuitry to mantain the signal integrity.
* VBUS overcurrent protection: USB power source current must not be pass 500mA, you should apply a protection into the baseboard. IGEP AQUILA EXPANSION Public Schematic proposes a solution using TPS2051D IC.
== I2C ==
=== Dedicated I2C ===
IGEP COM AQUILA uses I2C0 as a dedicated I2C. I2C0 is shared with PMIC (0x2d address) and have 5K Pull ups.
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| I2C0_SCL
| 41
| C16
|-
| I2C0_SDA
| 40
| C17
|}
=== Optional I2C ===
IGEP COM AQUILA contains two optional I2C buses:
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| I2C1_SCL
| 44
| A16
|-
| I2C1_SDA
| 47
| B16
|-
| I2C2_SCL
| 46
| B17
|-
| I2C2_SDA
| 48
| A17
|}
=== I2C design rules===
*I2C0 should be your default option, but it could be interesting use Optional I2Cs if your external peripheral need to use a huge transfer data connection.
*Optional I2Cs needs to be pulled up externally, 5K resistor tied to 3V3 must be necessary.
== SPI ==
=== Optional SPI ===
IGEP COM AQUILA contains two optional SPI bus:
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| SPI0_CS0
| 44
| A16
|-
| SPI0_CS1
| 45
| C15
|-
| SPI0_D0
| 46
| B17
|-
| SPI0_D1
| 47
| B16
|-
| SPI0_CLK
| 48
| A17
|-
| SPI1_CS0
| 60
| E15
|-
| SPI1_CS1
| 59
| E16
|-
| SPI1_D0
| 61
| E18
|-
| SPI1_D1
| 62
| E17
|-
| SPI1_CLK
| 68
| H16
|}
=== SPI design rules===
*Optional SPI1 is not recommended to use, because some lines are shared with UART0 (Kernel Debug UART).
== MMC ==
=== Dedicated MMC ===
IGEP COM AQUILA uses MMC0 from on board uSD card reader, but this pins are available into SODIMM connector too:
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| MMC0_CD
| 95
| A13
|-
| MMC0_DAT0
| 96
| G16
|-
| MMC0_DAT1
| 97
| G15
|-
| MMC0_DAT2
| 98
| F18
|-
| MMC0_DAT3
| 99
| F17
|-
| MMC0_CMD
| 100
| G18
|-
| MMC0_CLK
| 101
| G17
|}
=== Optional MMC ===
IGEP COM AQUILA contains an optional MMC bus called MMC1:
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| MMC1_CD
| 51
| B13
|-
| MMC1_DAT0
| 52
| K18
|-
| MMC1_DAT1
| 53
| L18
|-
| MMC1_DAT2
| 54
| L17
|-
| MMC1_DAT3
| 55
| L16
|-
| MMC1_CMD
| 56
| V9
|-
| MMC1_CLK
| 57
| U9
|}
=== MMC design rules ===
*MMC1 is not bootable during system boot process.
*MMC1 bus is a good option to expand memory capacities or use as a backup memory.
*MMC bus needs PU resistors to avoid unknown signals. 10K resistors from 3V3 source to SD1_Dx, SD1_CD and SD1_CLK must be necessary.
*Optionally: low resistance resistors could be necessary to equalize bus impedances. 10R series resistors to SD1_Dx, SD1_CD and SD1_CLK could be necessary.
== UART ==
=== Optional UARTs ===
IGEP COM AQUILA contains six optional UARTs buses:
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| UART0_TX
| 59
| E16
|-
| UART0_RX
| 60
| E15
|-
| UART0_CTS
| 61
| E18
|-
| UART0_RTS
| 62
| E17
|-
| UART1_TX
| 63
| D15
|-
| UART1_RX
| 64
| D16
|-
| UART1_CTS
| 65
| D18
|-
| UART1_RTS
| 66
| D17
|-
| UART2_TX
| 52
| K18
|-
| UART2_RX
| 53
| L18
|-
| UART3_TX
| 45
| C15
|-
| UART3_TX
| 54
| L17
|-
| UART3_RX
| 55
| L16
|-
| UART3_RX
| 74
| C18
|-
| UART4_TX
| 76
| J18
|-
| UART4_RX
| 81
| K15
|-
| UART5_TX
| 67
| J17
|-
| UART5_RX
| 68
| H16
|-
| UART5_CTS
| 97
| G15
|-
| UART5_RTS
| 96
| G16
|}
=== UART design rules ===
* IGEP COM AQUILA uses UART0 as a Kernel Debug Peripheral. This UART is a inexpensive method to detect and repair system issues. It is recommendable use another UART instead of UART0.
* UART5_RTS and UART5_CTS are shared with MMC0 (uSD card reader), don't use both at the same time. Find more information at [{{#lst:Template:Links|IGEP_COM_AQUILA_ISEE_Hardware}} IGEP COM AQUILA Hardware Reference Manual] section 6.1
* Don't use UART3_TX and UART3_RX in both SODIMM pins
== Video ==
=== Optional Video ===
IGEP COM AQUILA contains a LCD controller. This peripheral uses a Display Pixel Interface to transmit the information.
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| LCD_D0
| 117
| U10
|-
| LCD_D1
| 118
| U12
|-
| LCD_D2
| 119
| V13
|-
| LCD_D3
| 120
| U4
|-
| LCD_D4
| 121
| V2
|-
| LCD_D5
| 122
| V3
|-
| LCD_D6
| 123
| V4
|-
| LCD_D7
| 124
| T5
|-
| LCD_D8
| 125
| T10
|-
| LCD_D9
| 126
| T12
|-
| LCD_D10
| 127
| T2
|-
| LCD_D11
| 128
| T3
|-
| LCD_D12
| 130
| T4
|-
| LCD_D13
| 131
| U1
|-
| LCD_D14
| 132
| U2
|-
| LCD_D15
| 133
| U3
|-
| LCD_D16
| 134
| T11
|-
| LCD_D17
| 135
| R12
|-
| LCD_D18
| 136
| U13
|-
| LCD_D19
| 137
| R1
|-
| LCD_D20
| 138
| R2
|-
| LCD_D21
| 139
| R3
|-
| LCD_D22
| 140
| R4
|-
| LCD_D23
| 141
| T1
|-
| LCD_HSYNC
| 143
| R5
|-
| LCD_VSYNC
| 144
| U5
|-
| LCD_OE_ACD
| 145
| R6
|-
| LCD_SCLK
| 146
| V5
|}
=== Video design rules ===
*IGEP AQUILA EXPANSION Public Schematics adapts SODIMM video lines to HDMI Transmitter.
*Optionally: low capacitance capacitors could be necessary to filter high frequency interferences. 47p capacitors tied between data lines and GND could be necessary.
*Optionally: low resistance resistors could be necessary to equalize bus impedances. 10R series resistors to data and clock lines could be necessary.
== Audio ==
=== Optional Audio ===
IGEP COM AQUILA contains a two MCASP transceivers. This bus is can be used to attach Digital Signal Processors (DSPs), microprocessors, peripherals, and popular industry audio CODECs that implement the inter-IC sound bus standard (I2S) and Intel AC97 standard.
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| MCASP0_ACLKR
| 86
| B12
|-
| MCASP0_ACLKX
| 42 and 95
| A13
|-
| MCASP0_AHCLKR
| 73
| C12
|-
| MCASP0_AHCLKX
| 85
| A14
|-
| MCASP0_AXR0
| 83
|
|-
| MCASP0_AXR1
| 84
| D12
|-
| MCASP0_FSR
| 87
| C13
|-
| MCASP0_FSX
| 51
| B13
|}
=== Audio design rules ===
== ADCs ==
=== Dedicated ADCs ===
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| VADC
| 184
| -
|-
| XN
| 185
| B6
|-
| XP
| 186
| C7
|-
| YN
| 187
| B7
|-
| YP
| 188
| A7
|-
| WIPER
| 189
| C8
|-
| ADC5
| 190
| B8
|-
| ADC6
| 191
| A8
|-
| ADC7
| 192
| C9
|}
== PWM ==
=== Optinal PWM ===
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| EHRPWM0A
| 42 and 92
| A13
|-
| EHRPWM0B
| 51
| B13
|-
| EHRPWM2A
| 117
| U10
|-
| EHRPWM2B
| 125
| T10
|}
=== PWM Design rules ===
== GPIOs ==
== Optional GPIOs ==
All the optional SODIMM pins can be used as GPIOs. The following table shows some recommended SODIMMS pins to be used as GPIOs:
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| KP_COL0
| 72
| U16
|-
| KP_COL1
| 73
| C12
|-
| KP_COL2
| 74
| C18
|-
| KP_COL3
| 75
| U18
|-
| KP_ROW0
| 77
| A15
|-
| KP_ROW1
| 78
| D14
|-
| KP_ROW2
| 79
| V12
|-
| KP_ROW3
| 80
| T13
|-
| GPIO0
| 148
| V14
|-
| GPIO1
| 149
| U14
|-
| GPIO2
| 150
| T14
|-
| GPIO3
| 151
| U15
|-
| GPIO5
| 153
| T16
|-
| GPIO6
| 154
| V15
|-
| GPIO7
| 155
| R14
|}
== CAN ==
{| align="JUSTIFY" cellpadding="1" border="1" style="width: 300px; height: 1px;"
|-
| '''Name'''
| '''SODIMM pin'''
| '''AM335X pin'''
|-
| DCAN0_TX
| 76
| J18
|-
| DCAN0_RX
| 81
| K15
|-
| DCAN0_TX
| 65
| D18
|-
| DCAN0_RX
| 66
| D17
|-
| DCAN1_TX
| 64
| D16
|-
| DCAN1_RX
| 63
| D15
|-
| DCAN1_TX
| 101
| G17
|-
| DCAN1_RX
| 100
| G18
|}
{{Navigation/IGEP Technology Guides/Getting Started/Ending
|Next_Step=What can I do with IGEP COM AQUILA
}}
[[Category:IGEP Technology Devices Guides]]
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= Overview =
