Personal tools

Log in

Changes

From IGEP - ISEE Wiki

Jump to: navigation, search

Peripherals Summary

100 bytes removed, 12:39, 1 February 2012
no edit summary
I2C (Inter-Integrated Circuit) is a [http://en.wikipedia.org/wiki/Multi-master_bus multi-master] serial computer bus. There are four I2C in Omap, but only three avaliable (I2C4 is used to comunicate with TPS65950). Omap I2C use CMOS voltage level (1V8) and implements two signals:
- *SDA: Data. Open-drain output buffer. Requires external pullup resistor. <br>- *SCL: Clock, master device generate it. Open-drain output buffer. Requires external pullup resistor. <br>
Their caracteristics are:<br>
Their caracteristics are:<br>- *Compliance with Philips I2C specification version 2.1<br> - *Support for standard mode (up to 100K bits/s), fast mode (up to 400K bits/s) and HS mode for transfer up to 3.4M bits/s<br> - *Support for 3-wire/2-wire SCCB master mode for I2C2 and I2C3 modules, 2-wire SCCB master mode for I2C1 module, up to 100K bits/s<br> - *7-bit and 10-bit device addressing modes<br> - *Multimaster transmitter/slave receiver mode<br> - *Multimaster receiver/slave transmitter mode<br> - *Built-in FIFO for buffered read or write:<br> – *8 bytes for I2C1 and I2C2<br> – *64 bytes for I2C3<br> - *Module enable/disable capability<br> - *Programmable clock generation<br> - *8-bit-wide data access<br> - *Low-power consumption design<br> - *Two [http://en.wikipedia.org/wiki/Direct_memory_access DMA] channels<br> - *Wide interrupt capability<br>  <br>
More information:
*[http://omappedia.org/wiki/Kernel_I2C http://omappedia.org/wiki/Kernel_I2C]  *[http://en.wikipedia.org/wiki/I%C2%B2C http://en.wikipedia.org/wiki/I%C2%B2C]  <br>  *[[How to use I2C]]<br>
4,199
edits