4,199
edits
Changes
From IGEP - ISEE Wiki
no edit summary
- 64-byte FIFO for receiver and 64-byte FIFO for transmitter<br> - Programmable interrupt trigger levels for FIFOs<br> - Configurable data format<br> - Data bit: 5, 6, 7, or 8 bits<br> - Parity bit: Even, odd, none<br> - Stop-bit: 1, 1.5, 2 bit(s)<br> - Flow control: Hardware (RTS/CTS) or software (XON/XOFF)<br> - Supports [http://en.wikipedia.org/wiki/Direct_memory_access DMA] Mode for all UARTs.<br> - The speed transmion data is mesured in bauds per second, for example Kernel console params uses 115200 bps (equivalent to 14 Kbytes per second). The speed can set up from 300 bauds to 3686400 bauds.
'''NOTE:''' UART4 (avaliable in DM3730) is not avaliable in IGEPv2. But IGEP COM MODULE can use it, it is avaliable on:<br>
- gpmc_wait3/uart4_rx - J8 pin: UART4 Receive data (input)
- gpmc_wait2/uart4_tx - K8 pin: UART4 Transmit data (output)
<br>
[http://omappedia.org/wiki/Kernel_UART http://omappedia.org/wiki/Kernel_UART]
[[How to use UARTs]]
=== GPIO ===
Omap McSPI have the next caractheristics:
- Supports DMA for data transfer operations, for reduce CPU usage. <br> - Supports full duplex data transfer operations, <span lang="en" idclass="result_boxshort_text" classid="short_textresult_box"><span class="hps">simultaneous comunication between master and slave.</span></span><br> - Supports configuration of number of wordlength. <br> - Supports configuration of phase and polarity of the device functional clock for each channel. <br> - Support configuration of the bitrate for each channel. Between 1.5 KHz and 48 MHz
<br>
<br>
[[How to use I2C]]<br> '''Under construction'''
