Difference between revisions of "IMX6 Solo"
From IGEP - ISEE Wiki
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| − | == | + | ==Block diagram== |
<div style="padding-left: 150px;">[[File:Screenshot-2018-4-4_i_MX_6Solo_6DualLite_Applications_Processors_for_Consumer_Products_Data_Sheet_-_IMX6SDLCEC_pdf.png|563x439px]]</div> | <div style="padding-left: 150px;">[[File:Screenshot-2018-4-4_i_MX_6Solo_6DualLite_Applications_Processors_for_Consumer_Products_Data_Sheet_-_IMX6SDLCEC_pdf.png|563x439px]]</div> | ||
==Documentation== | ==Documentation== | ||
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==See also== | ==See also== | ||
* [[IMX6 Dual Lite|Dual Lite]] | * [[IMX6 Dual Lite|Dual Lite]] | ||
| − | * Dual | + | * [[IMX6 Dual|Dual]] |
| − | * Quad | + | * [[IMX6 Quad|Quad]] |
Revision as of 11:01, 4 April 2018
NXP i.MX6 Solo
CPU Complex
- 1x ARM Cortex-A9 up to 1 GHz
- NEON SIMD media accelerator
Memory
DDR
- 32 bit LP-DDR3/LV-DDR3
NAND
- SLC/MLC, 40-bit ECC, ONFI2.2, DDR
Advanced power management
Block diagram
Documentation
- i.MX 6Solo/6DualLite Applications Processors for Industrial Products
- i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors
- i.MX 6Solo/6DualLite Applications Processors for Consumer Products
- IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors
- i.MX 6 Series of Applications Processors Fact Sheet
- i.MX 6Solo/6DualLite Applications Processor Reference Manual
- LDB Clock Switch Procedure & i.MX6 Asynchronous Clock Switching Guidelines
