Difference between revisions of "IMX6 Solo"

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(Created page with "__TOC__ =NXP [https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-6-processors/i.mx-6solo-processors-single...")
 
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=NXP [https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-6-processors/i.mx-6solo-processors-single-core-multimedia-3d-graphics-arm-cortex-a9-core:i.MX6S i.MX6 Solo]=
 
=NXP [https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-6-processors/i.mx-6solo-processors-single-core-multimedia-3d-graphics-arm-cortex-a9-core:i.MX6S i.MX6 Solo]=
 
::: '''[[File:IMX6Solo_Diagrama.jpg]]'''
 
::: '''[[File:IMX6Solo_Diagrama.jpg]]'''
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::
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'''<u>CPU Complex</u>'''
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'''<u>MPU Subsystem</u>'''
 
  
 
::* 1x [http://www.arm.com/ ARM] [https://developer.arm.com/products/processors/cortex-a/cortex-a9 Cortex-A9] up to 1 GHz
 
::* 1x [http://www.arm.com/ ARM] [https://developer.arm.com/products/processors/cortex-a/cortex-a9 Cortex-A9] up to 1 GHz
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::* 512 KB L2 cache
 
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::* 32 KB instruction and data caches
 
 
::* [https://developer.arm.com/technologies/neon NEON SIMD media accelerator]
 
::* [https://developer.arm.com/technologies/neon NEON SIMD media accelerator]
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--------CANVIAR--------
 
  
 +
<u>'''Memory'''</u>
  
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<u>'''High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem.'''</u>
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<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">DDR
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* 32 bit LP-DDR3/LV-DDR3
  
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<u>'''POWERVR SGX™ Graphics Accelerator'''</u> (SGX530 [http://www.imgtec.com/ Imagination Technologies])
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NAND
  
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* SLC/MLC, 40-bit ECC, ONFI2.2, DDR
  
 +
</div>
 +
</div>
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<u>'''Advanced power management'''</u>
  
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<u>'''Fully Software-Compatible With C64x and ARM9™'''</u>
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<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"><div class="toggle_container">PMU integration </div>
 +
[https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
  
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<u>'''Commercial and Extended Temperature Grades'''</u>
 
  
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<u>'''Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core'''</u>
 
−
 
−
::* Eight Highly Independent Functional Units
 
−
[[File:fbd_sprs685d.png|center|499x431px]]
 
  
 +
<div class="toggle_container"></div>
 +
</div>
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==<u>Block diagram</u>==
 +
<div style='padding-left: 150px;'>[[File:Screenshot-2018-4-4_i_MX_6Solo_6DualLite_Applications_Processors_for_Consumer_Products_Data_Sheet_-_IMX6SDLCEC_pdf.png|563x439px]]</div>
 
==Documentation==
 
==Documentation==
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::* [http://downloads.isee.biz/pub/documentation/DM3730/DM3730,%20DM3725%20Digital%20Media%20Processors%20datasheet%20(Rev.%20D).pdf DM3730, DM3725 Digital Media Processors datasheet (Rev. D)]
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* [https://www.nxp.com/docs/en/data-sheet/IMX6SDLIEC.pdf  i.MX 6Solo/6DualLite Applications Processors for Industrial Products]
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::* [http://downloads.isee.biz/pub/documentation/DM3730/AM:DM37x%20Multimedia%20Device%20Technical%20Reference%20Manual%20(Silicon%20Revision%201.x)%20(Rev.%20R).pdf AM/DM37x Multimedia Device Technical Reference Manual (Silicon Revision 1.x) (Rev. R)]
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* [https://www.nxp.com/docs/en/data-sheet/IMX6SDLAEC.pdf  i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors]
−
::* [http://downloads.isee.biz/pub/documentation/DM3730/DM3730,%20DM3725%20Digital%20Media%20Processors%20Silicon%20Errata%20(Revs%201.2,%201.1%20&%201.0)%20(Rev.%20F).pdf DM3730, DM3725 Digital Media Processors Silicon Errata (Revs 1.2, 1.1 & 1.0) (Rev. F)]
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* [https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf  i.MX 6Solo/6DualLite Applications Processors for Consumer Products]
−
::* [http://downloads.isee.biz/pub/documentation/OMAP3/SYS:BIOS%20(TI-RTOS%20Kernel)%20User's%20Guide%20(Rev.%20T).pdf SYS:BIOS (TI-RTOS Kernel) User's Guide (Rev. T)]
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* [https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors]
−
::* [http://downloads.isee.biz/pub/documentation/OMAP3/TMS320C64x+%20DSP%20Megamodule.pdf TMS320C64x+ DSP Megamodule]
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* [https://www.nxp.com/docs/en/fact-sheet/IMX6SRSFS.pdf i.MX 6 Series of Applications Processors Fact Sheet]
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::* [http://downloads.isee.biz/pub/documentation/OMAP3/TMS320C64x-C64x+DSP%20CPU%20and%20Instruction%20set.pdf TMS320C64x-C64x+DSP CPU and Instruction set]
+
* [http://downloads.isee.biz/pub/documentation/OMAP3/TMS320C64x-C64x+DSP%20CPU%20and%20Instruction%20set.pdf][https://www.nxp.com/docs/en/reference-manual/IMX6SDLRM.pdf i.MX 6Solo/6DualLite Applications Processor Reference Manual]
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=See also=
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* [https://www.nxp.com/docs/en/engineering-bulletin/EB821.pdf LDB Clock Switch Procedure & i.MX6 Asynchronous Clock Switching Guidelines]
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::* [[TPS65950]]
 
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[[Category:IGEPv2]]
 
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[[Category:IGEP0030]]
 
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[[Category:TPS65950]]
 
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[[Category:OMAP3]]
 
−
[[Category:DM3730]]
 

Revision as of 09:55, 4 April 2018

NXP i.MX6 Solo

IMX6Solo Diagrama.jpg

CPU Complex

Memory

DDR
  • 32 bit LP-DDR3/LV-DDR3

NAND

  • SLC/MLC, 40-bit ECC, ONFI2.2, DDR

Advanced power management

Block diagram

Screenshot-2018-4-4 i MX 6Solo 6DualLite Applications Processors for Consumer Products Data Sheet - IMX6SDLCEC pdf.png

Documentation

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