Difference between revisions of "IMX6 Quad"

From IGEP - ISEE Wiki

Jump to: navigation, search
Line 25: Line 25:
 
<u>'''Advanced power management'''</u>
 
<u>'''Advanced power management'''</u>
  
<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"><div class="toggle_container">PMU integration </div>
+
<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne">
[https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
+
* PMU integration 
 +
* [https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
  
 
<u>'''Package and temperature'''</u>
 
<u>'''Package and temperature'''</u>

Revision as of 11:14, 4 April 2018

NXP i.MX6 Quad

IMX6Quad Diagram.jpg

CPU Complex

Memory

DDR
  • 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3

NAND

  • SLC/MLC, 40-bit ECC, ONFI2.2, DDR

Connectivity

  • S-ATA and PHY

Advanced power management

Package and temperature

  • 21 x 21mm, 0.8 mm BGA
  • Consumer (-20C to +105C), up to 1.2 GHz
  • Industrial (-40C to +105C), up to 800 MHz
  • Automotive (-40C to +125C), AEC-Q100, up to 1 GHz

Block diagram

Screenshot-2018-4-4 i MX 6Dual 6Quad Applications Processor for Consumer Products Data Sheet - IMX6DQCEC pdf(1).png

Documentation

See also