Difference between revisions of "IGEP0040TestsProtosRA"
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* Check main sources: 5V; 1V8 (WIFI clean); VDDQ; VTT; 1V2; 2V; 1V8 (V_1P8); 3V3 (V_3P3); VCC_MAIN --> OK no SS | * Check main sources: 5V; 1V8 (WIFI clean); VDDQ; VTT; 1V2; 2V; 1V8 (V_1P8); 3V3 (V_3P3); VCC_MAIN --> OK no SS | ||
* Overall consumption: 5V@0.21A ---> OK, less than Qseven and Sondrio but not dangerous | * Overall consumption: 5V@0.21A ---> OK, less than Qseven and Sondrio but not dangerous | ||
| − | * Removed Standalone Marvell debug flex connector ---> OK. Broken some NC pads from footprint | + | * Removed Standalone Marvell debug flex connector ---> OK. Broken some NC pads from footprint, but 1.27 mm header can be used |
* Add wires to get acces to JTAGB connector ---> OK | * Add wires to get acces to JTAGB connector ---> OK | ||
| − | * Test 25 MHz crystal --> add R950. OK | + | * Test 25 MHz crystal --> add R950, because datasheet recomends. OK |
* Test power pin decoupling mounted resistors--> OK | * Test power pin decoupling mounted resistors--> OK | ||
* Add PU (4K7) to PRI_TRST into board. The others PU has been added to converter --> OK | * Add PU (4K7) to PRI_TRST into board. The others PU has been added to converter --> OK | ||
Revision as of 18:48, 6 August 2015
Back to IGEP0040 main project page
VALIDATION OF PROTOTYPES
Document: TBD
IGEP0040-RA03 version - Micron memory
Firsts test applied to 1 hand labeled board:
- Visual mount inspection --> OK
- Check main sources: 5V; 1V8 (WIFI clean); VDDQ; VTT; 1V2; 2V; 1V8 (V_1P8); 3V3 (V_3P3); VCC_MAIN --> OK no SS
- Overall consumption: 5V@0.21A ---> OK, less than Qseven and Sondrio but not dangerous
- Removed Standalone Marvell debug flex connector ---> OK. Broken some NC pads from footprint, but 1.27 mm header can be used
- Add wires to get acces to JTAGB connector ---> OK
- Test 25 MHz crystal --> add R950, because datasheet recomends. OK
- Test power pin decoupling mounted resistors--> OK
- Add PU (4K7) to PRI_TRST into board. The others PU has been added to converter --> OK
- Mounted 26 MHz oscillator --> OK
- Umount all POWER bad resistors --> OK
- Add 330 nF to 3V3 enable LDO to delay 3_3P3 power source (RC: 10K/330nF) ---> OK
- Add 0R to R75 and R80 ---> OK
- Mount R931 to get access directly to eMMC ---> OK
Homemade JTAG black stone / JTAGB converter
| Signal Name | igep0040: JTAGB pos | Black Stone pos |
| V_1P8 | 1 | 1&2 |
| RESET_OUT | 2 | NC |
| RESET_IN_N2 | 3 | 15 |
| UART3_TXD0 | 4 | NC |
| UART3_RXD0 | 5 | NC |
| PRI_TRST_N | 6 | 3 |
| PRI_TMS | 7 | 7 |
| PRI_TCK | 8 | 9 |
| PRI_TDI | 9 | 5 |
| PRI_TDO | 10 | 13 |
| GND | 11 | 4 |
NOTE: Use PU (10K) from V_1P8 to: PRI_TRST_N, PRI_TDI and PRI_TCK and PRI_TMS
ISSUES AND IMPROVEMENTS
Go to IGEP0040HardwareRABugs for more information
IGEP0040-RA01 version - Hynix memory
TBD
IGEP0040-RA02 version - Samsung memory
IGEP0040-RA03 version - Micron memory
TBD
RA0x common
TBD
TESTS UTILS
JTAG
under construction
Serial debug
under construction
...
