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How to setup Marvell bluetooth

1,389 bytes added, 18:19, 18 July 2013

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At any point, if you see a mistake you can contribute to this How-To.

=== Setup basics == === Bluetooth Classes (information) ===

Some IGEP Technology boards has built-in a Class 2 Bluetooth 2.0 + EDR device.

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=== Setup bluetooth internal parameters ===

By default the WIFI-BT module is not configured for single antenna, so you need to configure this, set registers settings as follows:

# echo "0xa5f0 0xa027181c" > wrmac

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=== Validate serial comunication to CSR bluetooth xip ===

Configure ttyO1

 

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stty -F /dev/ttyO1 ispeed 115200 ospeed 115200 cs8 -cstopb clocal -crtscts -parodd

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To read CSR chip version

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root@igep0020:~# bccmd -t bcsp -d /dev/ttyO1 chiprev

Chip revision: 0x0030 (BC4-ROM)

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== Setup HCI device ==

 

=== Load Linux kernel modules ===

 

Next, you will need to load some bluetooth modules

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Configure ttyO1 port  <pre>stty -F /dev/ttyO1 ispeed 115200 ospeed 115200 cs8 -cstopb clocal -crtscts -parodd</pre>=== Load PSKEY parameter ===With your preferred editor create a 'bluez.psr ' file like this:

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// PSKEY Parameters for Bluetooth RF

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=== Create HCI device ===

Finally you can attach to device an scan for other bluetooth devices.

HCI Ver: 2.0 (0x3) HCI Rev: 0xc5c LMP Ver: 2.0 (0x3) LMP Subver: 0xc5c

Manufacturer: Cambridge Silicon Radio (10)

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=== Scan for HCI bluetooth peer devices ===

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# hcitool -i hci0 scan

Scanning ...

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== Others ==

 

=== Switch-off wifi to get better bluetooth performance ===

For best performance you need to disable WIFI, you can do this

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=== Ensure uart2 gpio/mux configuration ===

In IGEPv2 you should configure uart2_XXX pins like:

<pre>

root@igep00x0:~# mount -t debugfs none /sys/kernel/debug

 

root@igep00x0:~# cat /sys/kernel/debug/omap_mux/uart2_*

name: uart2_cts.uart2_cts (0x48002174/0x144 = 0x0118), b ab26, t NA

mode: OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0

signals: uart2_cts | mcbsp3_dx | gpt9_pwm_evt | NA | gpio_144 | NA | NA | safe_mode

To read CSR chip versionname: uart2_rts.uart2_rts (0x48002176/0x146 = 0x0000), b ab25, t NA<pre>mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE0root@igep0020signals:~# bccmd -uart2_rts | mcbsp3_dr | gpt10_pwm_evt | NA | gpio_145 | NA | NA | safe_mode name: uart2_rx.uart2_rx (0x4800217a/0x14a = 0x0100), b ad25, t bcsp -d /dev/ttyO1 chiprevNAmode: OMAP_PIN_INPUT | OMAP_MUX_MODE0signals: uart2_rx | mcbsp3_fsx | gpt8_pwm_evt | NA | gpio_147 | NA | NA | safe_mode Chip revisionname: 0x0030 uart2_tx.uart2_tx (BC4-ROM0x48002178/0x148 = 0x0000), b aa25, t NAmode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE0signals: uart2_tx | mcbsp3_clkx | gpt11_pwm_evt | NA | gpio_146 | NA | NA | safe_mode

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--- That's all folks ---

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