Difference between revisions of "IMX6"
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− | + | ==Features== | |
{| class="contenttable sortable" style="width: 890px;" | {| class="contenttable sortable" style="width: 890px;" | ||
− | |- | + | |- style="height: 22px;" |
− | | style=" | + | ! style="width: 74.1667px; height: 22px;"|Processor |
− | ===== | + | ! style="width: 213.833px; height: 22px;"|CPU |
− | | style=" | + | ! style="width: 309px; height: 22px;"|Memory |
− | + | ! style="width: 248px; height: 22px;"|Connectivity | |
− | ** | + | ! style="width: 248px; height: 22px;"|Display |
− | ** 2 | + | |- style="height: 391px;" |
− | ** 2 | + | ! style="width: 74.1667px; height: 391px;"| |
− | ** | + | ====='''Solo'''===== |
− | + | | style="width: 213.833px; height: 391px;"| | |
− | + | '''1x ARM Cortex-A9 up to 1 GHz''' | |
− | ** 1 | + | |
− | + | ||
− | + | ||
+ | '''512 KB L2 cache''' | ||
+ | |||
+ | |||
+ | |||
+ | '''32 KB instruction and data caches''' | ||
+ | |||
+ | |||
+ | |||
+ | '''NEON SIMD media accelerator''' | ||
+ | |||
+ | | style="width: 309px; height: 391px;"| | ||
+ | '''DDR''' | ||
+ | |||
+ | * 32 bit LP-DDR3/LV-DDR3 | ||
+ | |||
+ | |||
+ | '''NAND''' | ||
+ | |||
+ | * SLC/MLC, 40-bit ECC, ONFI2.2, DDR | ||
+ | |||
+ | | style="width: 248px; height: 391px;"| | ||
+ | '''Automotive''' | ||
+ | |||
+ | * FlexCAN | ||
+ | * MLB | ||
+ | |||
+ | '''Four USB2.0''' | ||
+ | |||
+ | * 1x HS OTG + PHY | ||
+ | * 1x Host + PHY | ||
+ | * 2x Host USB HSIC | ||
+ | |||
+ | '''Ethernet''' | ||
+ | |||
+ | * 1 Gbps + IEEE®1588 | ||
+ | |||
+ | '''Expansion Ports''' | ||
+ | |||
+ | * 3x SD/MMC 4.4, 1x SDXC | ||
+ | * 4x SPI, 5x UART, 3x I²C | ||
+ | * MIPI-HSI | ||
+ | * PCIe 2.0 (1 lane) | ||
+ | |||
+ | | style="width: 248px; height: 391px;"| | ||
+ | '''2 x WXGA (1366x786)''' | ||
+ | |||
+ | |||
+ | |||
+ | '''EPDC, LVDS, Parallel, MIPI-DS''' | ||
+ | |||
+ | |- style="height: 305px;" | ||
+ | ! style="width: 74.1667px; height: 305px;"| | ||
+ | ====='''Dual Lite'''===== | ||
+ | | style="width: 213.833px; height: 305px;"| | ||
+ | '''2x ARM Cortex-A9 up to 1 GHz''' | ||
+ | |||
+ | |||
+ | |||
+ | '''512 KB L2 cache''' | ||
+ | |||
+ | |||
+ | |||
+ | '''32 KB instruction and data caches''' | ||
+ | |||
+ | |||
+ | |||
+ | '''NEON SIMD media accelerator''' | ||
+ | |||
+ | | style="width: 309px; height: 305px;"| | ||
+ | '''DDR''' | ||
+ | |||
+ | * 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3 | ||
+ | |||
+ | |||
+ | '''NAND''' | ||
+ | |||
+ | * SLC/MLC, 40-bit ECC, ONFI2.2, DDR | ||
+ | |||
+ | | style="width: 248px; height: 305px;"| | ||
+ | '''Four USB2.0''' | ||
+ | |||
+ | * 1x HS OTG + PHY | ||
+ | * 1x Host + PHY | ||
+ | * 2x Host USB HSIC | ||
+ | |||
+ | '''Ethernet''' | ||
+ | |||
+ | * 1 Gbps + IEEE®1588 | ||
+ | |||
+ | '''Expansion Ports''' | ||
+ | |||
+ | * 3x SD/MMC 4.4, 1x SDXC | ||
+ | * 4x SPI, 5x UART, 3x I²C | ||
+ | * MIPI-HSI | ||
+ | * PCIe 2.0 (1 lane) | ||
+ | |||
+ | | style="width: 248px; height: 305px;"| | ||
+ | '''2 x WXGA (1366x786)''' | ||
+ | |||
+ | |||
+ | |||
+ | '''EPDC, LVDS, Parallel, MIPI-DS''' | ||
+ | |||
+ | |- style="height: 338px;" | ||
+ | ! style="width: 74.1667px; height: 338px;"| | ||
+ | ====='''Dual'''===== | ||
+ | | style="width: 213.833px; height: 338px;"| | ||
+ | '''2x ARM Cortex-A9 up to 1.2 GHz''' | ||
+ | |||
+ | |||
+ | |||
+ | '''1 MB L2 cache''' | ||
+ | |||
+ | |||
+ | |||
+ | '''32 KB instruction and data caches''' | ||
+ | |||
+ | |||
+ | |||
+ | '''NEON SIMD media accelerator''' | ||
+ | |||
+ | | style="width: 309px; height: 338px;"| | ||
+ | '''DDR''' | ||
+ | |||
+ | * 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3 | ||
+ | |||
+ | |||
+ | '''NAND''' | ||
+ | |||
+ | * SLC/MLC, 40-bit ECC, ONFI2.2, DDR | ||
+ | |||
+ | | style="width: 248px; height: 338px;"| | ||
+ | '''Four USB2.0''' | ||
+ | |||
+ | * 1x HS OTG + PHY | ||
+ | * 1x Host + PHY | ||
+ | * 2x Host USB HSIC | ||
+ | |||
+ | '''S-ATA II and PHY 3GB''' | ||
+ | |||
+ | '''Ethernet''' | ||
+ | |||
+ | * 1 Gbps + IEEE®1588 | ||
+ | |||
+ | '''Expansion Ports''' | ||
+ | |||
+ | * 3x SD/MMC 4.4, 1x SDXC | ||
+ | * 4x SPI, 5x UART, 3x I²C | ||
+ | * MIPI-HSI | ||
+ | * PCIe 2.0 (1 lane) | ||
+ | |||
+ | | style="width: 248px; height: 338px;"| | ||
+ | '''2 x 4XGA (2048x1536) or 2 x [1080p + WXGA (1280x720)]''' | ||
+ | |||
+ | |||
+ | |||
+ | '''EPDC, LVDS, Parallel, MIPI-DS''' | ||
+ | |||
+ | |- style="height: 335.75px;" | ||
+ | ! style="width: 74.1667px; height: 335.75px;"| | ||
+ | ====='''Quad'''===== | ||
+ | | style="width: 213.833px; height: 335.75px;"| | ||
+ | '''4x ARM Cortex-A9 up to 1.2 GHz''' | ||
+ | |||
+ | |||
+ | |||
+ | '''1 MB L2 cache''' | ||
+ | |||
+ | |||
+ | |||
+ | '''32 KB instruction and data caches''' | ||
+ | |||
+ | |||
+ | |||
+ | '''NEON SIMD media accelerator''' | ||
+ | |||
+ | | style="width: 309px; height: 335.75px;"| | ||
+ | '''DDR''' | ||
+ | |||
+ | * 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3 | ||
+ | |||
+ | |||
+ | '''NAND''' | ||
+ | |||
+ | * SLC/MLC, 40-bit ECC, ONFI2.2, DDR | ||
+ | |||
+ | | style="width: 248px; height: 335.75px;"| | ||
+ | '''Four USB2.0''' | ||
+ | |||
+ | * 1x HS OTG + PHY | ||
+ | * 1x Host + PHY | ||
+ | * 2x Host USB HSIC | ||
+ | |||
+ | '''S-ATA II and PHY 3GB''' | ||
+ | |||
+ | '''Ethernet''' | ||
+ | |||
+ | * 1 Gbps + IEEE®1588 | ||
+ | |||
+ | '''Expansion Ports''' | ||
+ | |||
+ | * 3x SD/MMC 4.4, 1x SDXC | ||
+ | * 4x SPI, 5x UART, 3x I²C | ||
+ | * MIPI-HSI | ||
+ | * PCIe 2.0 (1 lane) | ||
+ | |||
+ | | style="width: 248px; height: 335.75px;"| | ||
+ | '''2 x 4XGA (2048x1536) or 2 x [1080p + WXGA (1280x720)]''' | ||
+ | |||
+ | |} | ||
+ | |||
+ | ==Shared features== | ||
+ | {| class="contenttable sortable" style="width: 890px; border-color: #ffffff;" | ||
|- | |- | ||
− | | style="background-color: #e6e6e6;"| | + | | style="background-color: #e6e6e6; width: 258.833px;"| |
=====Multimedia===== | =====Multimedia===== | ||
− | | style="border-color: # | + | | style="border-color: #c2c2c2;"|<div id="panel2" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container"> |
* '''GPU 3D''' | * '''GPU 3D''' | ||
** Vivante GC880 | ** Vivante GC880 | ||
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=====Advanced Power Management===== | =====Advanced Power Management===== | ||
− | | style="border-color: # | + | | style="border-color: #c2c2c2;"|<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container"> |
* '''PMU integration''' | * '''PMU integration''' | ||
* '''NXP PF100 power management unit''' | * '''NXP PF100 power management unit''' | ||
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</div> | </div> | ||
|- | |- | ||
− | | style="background-color: #e6e6e6;"| | + | | style="background-color: #e6e6e6; width: 258.833px;"| |
=====Security supporting===== | =====Security supporting===== | ||
− | | style="border-color: # | + | | style="border-color: #c2c2c2;"|<div class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container"> |
* '''High Assurance Boot''' | * '''High Assurance Boot''' | ||
* '''Cryptographic cipher engines''' | * '''Cryptographic cipher engines''' |
Latest revision as of 11:51, 3 April 2018
Contents
Overview:
The i.MX 6 series of applications processors combines scalable platforms with broad levels of integration and power-efficient processing capabilities particularly suited to multimedia applications.
- Enhanced capabilities of high-tier portable applications by fulfilling MIPS needs of operations systems and games
- Multilevel memory system
- Smart speed technology that enables the designer to deliver a feature-rich product, requiring levels of power far lower than industry expectations
- Dynamic voltage and frequency scaling
- Powerful graphics acceleration
- Interface flexibility
- Integrated power management throughout the device
- Advanced hardware-enabled security
Features
Processor | CPU | Memory | Connectivity | Display |
---|---|---|---|---|
Solo |
1x ARM Cortex-A9 up to 1 GHz
512 KB L2 cache
32 KB instruction and data caches
NEON SIMD media accelerator |
DDR
|
Automotive
Four USB2.0
Ethernet
Expansion Ports
|
2 x WXGA (1366x786)
EPDC, LVDS, Parallel, MIPI-DS |
Dual Lite |
2x ARM Cortex-A9 up to 1 GHz
512 KB L2 cache
32 KB instruction and data caches
NEON SIMD media accelerator |
DDR
|
Four USB2.0
Ethernet
Expansion Ports
|
2 x WXGA (1366x786)
EPDC, LVDS, Parallel, MIPI-DS |
Dual |
2x ARM Cortex-A9 up to 1.2 GHz
1 MB L2 cache
32 KB instruction and data caches
NEON SIMD media accelerator |
DDR
|
Four USB2.0
S-ATA II and PHY 3GB Ethernet
Expansion Ports
|
2 x 4XGA (2048x1536) or 2 x [1080p + WXGA (1280x720)]
EPDC, LVDS, Parallel, MIPI-DS |
Quad |
4x ARM Cortex-A9 up to 1.2 GHz
1 MB L2 cache
32 KB instruction and data caches
NEON SIMD media accelerator |
DDR
|
Four USB2.0
S-ATA II and PHY 3GB Ethernet
Expansion Ports
|
2 x 4XGA (2048x1536) or 2 x [1080p + WXGA (1280x720)] |
Multimedia |
|
Advanced Power Management |
|
Security supporting |
|
i.MX6 Solo / Dual Lite
Excluding the main features they share a lot of specifications.
The i.MX 6Solo/6DualLite processors are specifically useful for applications such as:
- Graphics rendering for Human Machine Interfaces (HMI)
- High-performance speech processing with large databases
- Video processing and display
- Portable medical
- Home energy management systems
- Industrial control and automation
i.MX6 Dual / Quad
Excluding the main characteristics they share a lot of specifications
The i.MX 6Dual/6Quad processors are specifically useful for applications such as the following:
- Netbooks (web tablets)
- Nettops (Internet desktop devices)
- High-end mobile Internet devices (MID)
- High-end PDAsHigh-end portable media players (PMP) with HD video capability
- Gaming consoles
- Portable navigation devices (PND)