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=== Optional SPI ===
IGEP COM AQUILA contains an two optional SPI bus called SPI1:*SPI1_CS1 SPI0:**SPI0_CS0 at SODIMM line 44.**SPI0_CS1 at SODIMM line 45.**SPI0_D0 at SODIMM line 46.**SPI0_D1 at SODIMM line 47.**SPI0_CLK at SODIMM line 5948.*SPI1:**SPI1_CS0 at SODIMM line 60.**SPI1_CS1 at SODIMM line 59.**SPI1_D0 at SODIMM line 61.**SPI1_D1 at SODIMM line 62.**SPI1_CLK at SODIMM line 68.
=== I2C SPI design notes===
*Optional SPI1 is not recommended to use, because some lines are shared with UART0 (Kernel DebugUART).
== MMC ==