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Peripherals Summary

1,053 bytes added, 10:14, 25 November 2011
I2C
=== I2C ===
I2C (Inter-Integrated Circuit) is a [http://en.wikipedia.org/wiki/Multi-master_bus multi-master] serial computer bus. Omap I2C peripheral implements two signals: <br>
- SDAOmap I2C peripheral implements two signals: Data.<br>- SCL: Clock.<br>
There are four I2C in Omap- SDA: Data. Open-drain output buffer. Requires external pullup resistor. <br>- SCL: Clock, but only three avaliable (I2C4 is used to comunicate with TPS65950)master device generate it. Open-drain output buffer. Requires external pullup resistor.<br>
There are four I2C in Omap, but only three avaliable (I2C4 is used to comunicate with TPS65950). Their caracteristics are:<br>
- Compliance with Philips I2C specification version 2.1<br> -Support for standard mode (up to 100K bits/s), fast mode (up to 400K bits/s) and HS mode for transfer up to 3.4M bits/s<br> -Support for 3-wire/2-wire SCCB master mode for I2C2 and I2C3 modules, 2-wire SCCB master mode for I2C1 module, up to 100K bits/s<br> -7-bit and 10-bit device addressing modes<br> -General call<br> -Start/restart/stop<br> -Multimaster transmitter/slave receiver mode<br> -Multimaster receiver/slave transmitter mode<br> -Combined master transmit/receive and receive/transmit mode<br> -Built-in FIFO for buffered read or write:<br> – 8 bytes for I2C1 and I2C2<br> – 64 bytes for I2C3<br> -Module enable/disable capability<br> -Programmable clock generation<br> -8-bit-wide data access<br> -Low-power consumption design<br> -Two DMA channels<br> -Wide interrupt capability
 
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[[How to use I2C]]
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