4,199
edits
Changes
no edit summary
| LCD pixel data bit<br>
|
UART1_CTS(mode=2)
GPIO_70(mode=4)
| <div align="JUSTIFY">-<br></div>
| LCD pixel data bit
|
UART1_RTS(mode=2)
GPIO_71(mode=4)
| <div align="JUSTIFY"><br></div> <div align="JUSTIFY">-<br></div>
| LCD pixel data bit
|
GPIO_72(mode=4)
| <div align="JUSTIFY"><br>
|-
| 6
| DVI_DATA3
|
DSS_D3
| LCD pixel data bit
|
GPIO_73(mode=4)
| <div align="JUSTIFY">-<br></div> <div align="JUSTIFY"><br></div>
| LCD pixel data bit
|
UART3_RX(mode=2)
GPIO_74(mode=4)
| LCD pixel data bit
|
UART3_TX(mode=2)
GPIO_75(mode=4)<br>
| DVI_DATA6
| DSS_D6
| LCD pixel data bit
|
UART1_TX(mode=2)
GPIO_76(mode=4)
| <div align="JUSTIFY"><br></div> <div align="JUSTIFY"><div align="JUSTIFY"><br></div></div>
| LCD pixel data bit
|
UART1_RX(mode=2)
GPIO_77(mode=4)
| <div align="JUSTIFY"><br></div> <div align="JUSTIFY"><br></div>
| LCD pixel data bit
|
DSS_D0 (mode=3) MCSPI3_CLK(mode=2) GPIO_88(mode=4)
| <br>
| LCD pixel data bit
|
DSS_1 (mode=3)
MCSPI3_SIMO(mode=2)
GPIO_89(mode=4)
| LCD pixel data bit
|
DSS_D2 (mode=3)
MCSPI3_SOMI(mode=2)
GPIO_90(mode=4)
| LCD pixel data bit
|
DSS_3 (mode=3)
MCSPI3_CSO(mode=2)
GPIO_91(mode=4)
| LCD pixel data bit
|
DSS_D4 (mode=3)
MCSPI3_CS1(mode=2)
GPIO_92(mode=4)
| LCD pixel data bit
|
DSS_D5(mode=3)
GPIO_93(mode=4)