Difference between revisions of "IMX6 Quad"

 
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<u>'''Memory'''</u>
 
<u>'''Memory'''</u>
  
<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">DDR
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<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true">
* 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3
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* DDR
 
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** 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3
NAND
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* NAND
 
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** SLC/MLC, 40-bit ECC, ONFI2.2, DDR
* SLC/MLC, 40-bit ECC, ONFI2.2, DDR
 
  
 
<u>'''Connectivity'''</u>
 
<u>'''Connectivity'''</u>
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* S-ATA and PHY
 
* S-ATA and PHY
  
</div>
 
 
</div>
 
</div>
 
<u>'''Advanced power management'''</u>
 
<u>'''Advanced power management'''</u>
  
<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"><div class="toggle_container">PMU integration </div>
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<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne">
[https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
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* PMU integration 
 +
* [https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
  
 
<u>'''Package and temperature'''</u>
 
<u>'''Package and temperature'''</u>

Latest revision as of 12:02, 4 April 2018

Contents

NXP i.MX6 Quad