Changes

IMX6 Dual Lite

279 bytes added, 12:01, 4 April 2018

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'''<u>CPU Complex</u>'''

::* 2x [http://www.arm.com/ ARM] [https://developer.arm.com/products/processors/cortex-a/cortex-a9 Cortex-A9] up to 1 GHz::* [https://developer.arm.com/technologies/neon NEON SIMD media accelerator]

<u>'''Memory'''</u>

<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">* DDR** 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3* NAND** SLC/MLC, 40-bit ECC, ONFI2.2, DDR

NAND</div><u>'''Advanced power management'''</u> <div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne">* PMU integration * [https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]

<u>'''Package and temperature'''</u> <div id="panel8" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">* SLC/MLC21 x 21 0.8 mm BGA* Consumer (0C to +95C -20C to +105C or -20C to +105C), 40up to 1 GHz* Industrial (-bit ECC40C to +105C), ONFI2.2, DDRup to 800 MHz* Automotive (-40C to +125C)

</div>

</div>

<u>'''Advanced power management'''</u>

 

<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"><div class="toggle_container">PMU integration </div>

[https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]

 

</div>

==<u>Block diagram</u>==

<div style="padding-left: 150px;">[[File:Screenshot-2018-4-4_i_MX_6Solo_6DualLite_Applications_Processors_for_Consumer_Products_Data_Sheet_-_IMX6SDLCEC_pdf(1).png|600x480px]]</div>

==Documentation==

* [https://www.nxp.com/docs/en/data-sheet/IMX6SDLIEC.pdf i.MX 6Solo/6DualLite Applications Processors for Industrial Products ]* [https://www.nxp.com/docs/en/data-sheet/IMX6SDLAEC.pdf i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors ]* [https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf i.MX 6Solo/6DualLite Applications Processors for Consumer Products ]

* [https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors]

* [https://www.nxp.com/docs/en/fact-sheet/IMX6SRSFS.pdf i.MX 6 Series of Applications Processors Fact Sheet]

* [https://www.nxp.com/docs/en/reference-manual/IMX6SDLRM.pdf i.MX 6Solo/6DualLite Applications Processor Reference Manual]

* [https://www.nxp.com/docs/en/engineering-bulletin/EB821.pdf LDB Clock Switch Procedure & i.MX6 Asynchronous Clock Switching Guidelines]

==See also==

* [[IMX6 Solo|Solo]]

* [[IMX6 Dual|Dual]]* [[IMX6 Quad|Quad]]* [https://www.nxp.com/video/:IMX6SERIES_VID i.MX 6 User Experience - Breaking Boundaries - Use Case]

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Francesc Megias

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