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IMX6 Dual

263 bytes added, 12:01, 4 April 2018
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'''<u>CPU Complex</u>'''
::* 2x [http://www.arm.com/ ARM] [https://developer.arm.com/products/processors/cortex-a/cortex-a9 Cortex-A9] up to 1.2 GHz::* [https://developer.arm.com/technologies/neon NEON SIMD media accelerator]
<u>'''Memory'''</u>
<div id="panel3" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">* DDR** 2x32 LP-DDR2, 1x64 DDR3 / LV-DDR3 * NAND ** SLC/MLC, 40-bit ECC, ONFI2.2, DDR
<u>'''Connectivity'''</u>
* S-ATA and PHY
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<u>'''Advanced power management'''</u>
<div id="panel6" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne"><div class="toggle_container">* PMU integration </div>* [https://www.nxp.com/products/power-management/pmics/configurable-pmics-pf-series/14-channel-configurable-power-management-ic:MMPF0100 NXP PF100 power management unit]
 <u>'''Package and temperature'''</u>
 
<div id="panel8" class="panel-collapse collapse in" role="tabpanel" aria-labelledby="headingOne" aria-expanded="true"><div class="toggle_container">
* 21 x 21mm, 0.8 mm BGA
* Consumer (-20C to +105C), up to 1.2 GHz
* Industrial (-40C to +105C), up to 800 MHz
* Automotive (-40C to +125C), AEC-Q100, up to 1 GHz
 
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==Block diagram==
* [https://www.nxp.com/docs/en/fact-sheet/IMX6SRSFS.pdf i.MX 6 Series of Applications Processors Fact Sheet]
* [https://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf i.MX 6Dual/6Quad Applications Processor Reference Manual]
* [https://www.nxp.com/docs/en/engineering-bulletin/EB821.pdf LDB Clock Switch Procedure & i.MX6 Asynchronous Clock Switching Guidelines]
==See also==
* [[IMX6 Dual Lite|Dual Lite]]
* [[IMX6 Quad|Quad]]
* [https://www.nxp.com/video/:IMX6SERIES_VID i.MX 6 User Experience - Breaking Boundaries - Use Case]
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