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→Calculate systematic clock error
=== Calculate systematic clock error ===
Every IGEP Board has its own systematic clock error. To find it, we use use [http://labs.isee.biz/index.php/How_to_adjust_Hardware_RTC_clock#ntpdate__program ntpdate program] to calculate the clock offset added every day. In my IGEP Board this systematic drift was +3.6 seconds/day.
=== Rectify systematic error using PMIC RTC registers ===
