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How to adjust Hardware RTC clock

921 bytes added, 22:11, 29 October 2017
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{{Message/Work in progress}}= Overview =Real time clock (RTC) is a computer clock (most often in the form of an integrated circuit) that keeps track of the current time. RTCs are present in almost any electronic device which needs to keep accurate time. More general information [http://en.wikipedia.org/wiki/Real-time_clock here].
Real time clock (IGEP Boards have two RTC) is a computer clock (most often in the form of an integrated circuit) that keeps track of the current time. RTCs are present in almost any electronic device which needs to keep accurate time. More general information [httpclocks, each one located at MPU and PMIC://en.wikipedia.org/wiki/Real-time_clock here].<br>
In IGEP Boards, * '''RTC System clock''': system clock is controlled by MPU and PMIC contains each one a using its internal RTC peripheral. Every boot-up, the default firmware (/etc/init.d/hwclock.sh) copies the hardware clock data from /dev/rtc to system clock to keeps clock:up to date.
* '''RTC System Hardware clock''': system hardware clock is controlled by OMAP processors PMIC using its internal RTC peripheral. Every bootupRTC PMIC affords two behaviours:** '''RTC battery is not used''': PMIC RTC peripheral keeps hardware clock alive when OS isn't running and power source is active. If the power source fails, the default firmware copies the hardware PMIC RTC peripheral will lose its clock data from /dev/rtc to system clock data to .** '''RTC battery is used''': PMIC RTC peripheral keeps hardware clock up to datealive when OS isn't running and backup battery powers the backup state as far as the input voltage is high enough (at least 2 weeks into IGEPv2).
* '''RTC Hardware clock''': hardware clock is controlled by PMIC IC using its internal RTC peripheral. RTC PMIC can afford two behaviours:** RTC battery is not used: PMIC RTC peripheral keeps hardware clock alive when OS isn't running and power source is active. If the power source fails, the RTC Hardware clock will lose its clock.** RTC battery is used: PMIC RTC peripheral keeps hardware clock alive when OS isn't running and backup battery powers the backup state as far as the input voltage is high enough. == Simplified RTC diagram == {| cellspacingborder="1" cellpaddingwidth="1150" widthcellspacing="1501" bordercellpadding="1" align="center"
|-
|| [[Image:RTC diagram.png|800px|Block diagram from IGEP0033]]<br>
|}
= Requirements = 
This How-to has been tested with an IGEPv2 RC Board (DM3730 and TPS65950), steps used below can be slightly different for other boards:
* IGEPv2 with its power supply
* [[IGEP firmware Yocto]]
* Network cablewith Internet acces
* PC
= Rectify clock drift=IGEP Boards use as a source clock an external 32,768 kHz crystal. This passive component can add clock drifts due: * General drift error* Ambient temperature drift error* Aging drift error* ...
IGEP Boards use as a source clock a 32Software tools can be used to compensate these errors. Once you tested your implementation add some rule to [http://es.wikipedia.768kHz crystalorg/wiki/Cron_%28Unix%29 cron deamon] to automatize the process. This passive component can add clock drifts dueSome available solutions are:
*General drift error==Set the date and time via NTP==*Ambient temperature error*Aging error* If your board is connected to Internet regularly, this can be the most interesting workaround.The network time protocol (NTP) is the current widely accepted standard for synchronizing clocks over the Internet.NTP uses a hierarchical scheme in order to synchronize the clocks in the network.
Some software tools can be used to compensate these errors. Once you tested your implementation add some rule to [http://es.wikipedia.org/wiki/Cron_%28Unix%29 cron deamon] to automatize it.
== Set the date and time via NTP ==
If your board its is connected to ===ntpd deamon===You should configure "/etc/ntp.conf" with appropriated Internet, this can be the most interesting workaround. The network time protocol ntp server (NTP) is the current widely accepted standard for synchronizing clocks over the Internetexample: "server pool. NTP uses a hierarchical scheme in order to synchronize the clocks in the networkntp.org")
=== To force time synchronization, it could be used [http://manpages.ubuntu.com/manpages/maverick/man8/ntpd.8.html ntpd daemon with "-q" option] (This behavior mimics that of the ntpdate (8) program ===)
<pre>ntpd -d -c /etc/ntp.conf -q</pre>===(alternative) ntpdate program===Ntpdate program is not installed into firmware by default, use zypper program to download and install the package:
* Uninstall ntp deamon:
 <pre> zypper rm ntp</pre>
* Install ntpdate
<pre>zypper in ntpdate </pre>
<pre>zypper in ntpdate</pre> Once you installed the programfinished it, make sure that IGEP is connected to Internet.
* Synchronize system clock and hardware clockwith NTP server:
<pre> ntpdate pool.ntp.org; hwclock --systohc </pre>
* Compare offset between ntp server and your system clock:
<pre> ntpdate -q pool.ntp.org && date </pre> If the result is positive, it means that your system clock is delayed and viceversa.
If ==Rectify systematic error editing PMIC RTC registers==This workaround can be helpful when your result board is positive, it means that your system not regularly connected to Internet. For this method we are going to: * Calculate systematic clock error* Rectify systematic clock is delayed and viceversa.error configuring PMIC RTC registers
=== ntpd deamon Calculate systematic clock error===Each IGEP Board has its own systematic clock error. To guess it, Can be helpful use [http://labs.isee.biz/index.php/How_to_adjust_Hardware_RTC_clock#ntpdate__program ntpdate program] to calculate systematic clock error added every day:
'''Under contruction'''* Synchronize your system clock using: ntpdate pool.ntp.org* Compare actual offset (it is recommendable wait between one or two days to deprecate random errors produced by crystal and ntp synchronization): ntpdate -q pool.ntp.org && date
== Rectify Finally, my IGEPv2 RC Board was a systematic error editing PMIC RTC registers ==This workaround can be helpful when your board is not connected to Internetdrift of +3.6 seconds/day aprox. Using this method we are going to:* Calculate systematic clock error* Rectify systematic error using PMIC RTC registers
=== Calculate Rectify systematic clock error configuring PMIC RTC registers=======Overview====Now its time to compensated this delayed drift (+3.6 seconds/day) configuring PMIC RTC registers. The edited registers will be:
Every IGEP Board has its own systematic clock error* RTC_CTRL_REG: Enables RTC compensation. To find it, we use use ** I2c bus: I2C1** Address: 0x4b** Register: 0x29* RTC_COMP_LSB_REG: 16 bits LSB of drift value (COM_REG) in ([http://labsen.iseewikipedia.bizorg/wiki/Two%27s_complement Two's complement]).** I2c bus: I2C1** Address: 0x4b** Register: 0x2c* RTC_COMP_MSB_REG: 16 bits MSB of drift value (COM_REG) in ([http:/index/en.phpwikipedia.org/How_to_adjust_Hardware_RTC_clock#ntpdate__program ntpdate programwiki/Two%27s_complement Two's complement] to calculate the clock offset added every day).** I2c bus: I2C1** Address: 0x4b** Register:0x2d
* Syncronize your system ====Calculate COM_REG value====If autocompensation is enabled PMIC RTC peripheral will compensate every hour and 1 second the clock drift using: ntpdate poolthe COMP_REG value, It adds or substract a second.ntp.org* Compare actual offset (The next formula shows how to calculate it is recommendable wait one or two days to deprecate random clock errors): ntpdate -q pool.ntp.org && date
My IGEP Board was a systematic drift of +3.6 seconds/day aprox[[File:Rtc formula.gif]]
=== Rectify systematic error using PMIC RTC registers ===Now pass your COMP_REG decimal value to hexadecimal, in my case was 0X1333 (4915).
==== Overview Edit registers====Registers will be edited using the i2c-tools, these registers will be saved until RTC source is not active:
Using as a reference +3.6 seconds/day, now its time to compensated this delayed drift configuring PMIC RTC registers. These registers are:*RTC_CTRL_REG: Used to enable RTC Enable Hardware compensation.**I2c bus: I2C1**Address: 0x4b**Register: 0x29*RTC_COMP_LSB_REG: Less significant bit of drift value (COM_REG) in 16 bit [http://en.wikipedia.org/wiki/Two%27s_complement Two's complement].**I2c bus: I2C1**Address: 0x4b**Register: 0x2c*RTC_COMP_MSB_REG: Most significant bit of drift value (COM_REG) in 16 bit [http://en.wikipedia.org/wiki/Two%27s_complement Two's complement].**I2c bus: I2C1**Address: 0x4b**Register: 0x2d
==== Calculate COM_REG value ====<pre> i2cset -f -y 1 0x4b 0x29 0x05 </pre> If RTC_CTRL_REG * Write RTC_COMP registers:
PMIC RTC peripheral compensates every hour and <pre>i2cset -f -y 1 second the clock drift using the COMP_REG value. Use the next formula to calculate it0x4b 0x2d 0x13i2cset -f -y 1 0x4b 0x2c 0x33 </pre>* Check register values:
[[File:Rtc formula.gif]]<pre>i2cdump -y -f 1 0x4b </pre>
Now pass your COMP_REG decimal value to 16 bit hexadecimal, in my case was 0X1333More information at [http://www. COMP_REG will be added to the RTC 32-kHz counter, the duration of the current second becomes [(32,768 – COMP_REG)ti.com/litv/pdf/32,768swcu050g TPS65950 TRM] seconds; therefore, it is possible to compensate the RTC with 1/32,768-second time unit accuracy each hoursection 3.4.2
==== Edit registers Correct system clock====Hardware clock will be compensated automatically, to transfer hardware clock to system clock is necessary use hwclock command:
<pre> hwclock --hctosys</pre>
==== Correct system clock ====[[Category:RTC]]
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