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Connectors Summary

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= Overview =
This wiki has information about IGEP connectors, this article is based in [[Linux Kernel 2.6.37.y|Kernel 2.6.37.y]] and IGEP Xloader without expansion support.<br>  More You can find more information in schematics and manuals.<br>
= Connectors =
== IGEPv2 == {| cellspacing="1" cellpadding="1" border="1" align="center" width="200"|-| [[Image:Igepv2 rc photo2.jpg]]|} Table informationInformation tables:
*'''Pad''' number. See PCB.
*"'''Connect toPad Name'''" is a name used in schematics, usually it will be default peripheral name (mode=0) *IGEP '''main peripheralInitial mode'''
*'''Main utility'''
*'''Other available peripherals'''. See this page for more information *"'''Share with'''" is alternate configuration for pad. See this page for more information === J990 connector === Using this expansion connector you have access to McBSP1, McBSP3, I2C2, MMC2(8 bits), nReset and REGEN signals from OMAP Processor. The interface is at 1.8V on all signals. Only 1.8V CMOS levels are supported. DO NOT expose the header to 3.3V. J990 connector is [http://beagleboard.org/ BeagleBoard] compatible expansion connector. IGEPv2-NOWIFI board is fully compatible. Other IGEPv2 board versions need software [Mux configuration to disable wifi interface and others because of shared hardware lines. MMC2 interface is used by wifi module. McBSP3 interface is used by PCM TPS65950 interface.  See which versions have WIFI/BT combo [[Frequently Asked Questions and Their Answers#Which_revision_is_my_IGEPv2_board.3FMode_selection|availablethis page]].  {| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 739px; height: 1712px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with|-| 1 | VIO 1V8 | - | Power 1v8 | - | -|-| 2 | DC 5V | - | Power 5v | - | -|-| 3 | MMC2_DAT7 | GPIO_139(mode=4) | Reset WIFI | MMC2_DAT7(mode=0)<br>MMC2_CLKIN(mode=1)<br>MMC3_DAT3(mode=3)  | WIFI/BT combo:WIFI|-| 5 | MMC2_DAT6 | GPIO_138(mode=4) | Power down WIFI | MMC2_DAT6(mode=0)<br>MMC2_DIR_CMD(mode=1)<br>MMC3_DAT2(mode=3)  | WIFI/BT combo:WIFI|-| 7 | MMC2_DAT5 | GPIO_137(mode=4) | Reset BT | MMC2_DAT5(mode=0)<br>MMC2_DIR_DAT1(mode=1)<br>MMC3_DAT1(mode=3)<br>  | WIFI/BT combo:BT|-| 9 | MMC2_DAT4 | GPIO136(mode=4) | - | MMC2_DAT4(mode=0)<br>MMC_DIR_DAT0(mode=1)<br>MMC3_DAT0(mode=3)<br>  | WIFI/BT combo:WIFI|-| 11 | MMC2_DAT3 | MMC2_DAT3(mode=0) | Transfer data | McSPI3_CS0(mode=1)<br>GPIO_135(mode=4)  | WIFI/BT combo:WIFI|-| 13 | MMC2_DAT2 | MMC2_DAT2(mode=0) | Transfer data | McSPI3_CS1(mode=1)<br>GPIO_134(mode=4)  | WIFI/BT combo:WIFI|-| 15 | MMC2_DAT1 | MMC2_DAT1(mode=0) | Transfer data between Omap and WIFI | GPIO_133(mode=4) | WIFI/BT combo:WIFI|-| 17 | MMC2_DAT0 | MMC2_DAT0(mode=0) | Transfer data | McSPI3_SOMI(mode=1)<br>GPIO_132(mode=4)  | WIFI/BT combo:WIFI|-| 19 | MMC2_CMD | MMC2_CMD(mode=0) | Control Wire for bus MMC2 (WIFI) | McSPI3_SIMO(mode=1)<br>GPIO_131(mode=4)  | WIFI/BT combomore information:WIFI|-| 21 | MMC2_CLK0 | MMC2_CLK(mode=0) | Clock for MMC2 (WIFI) | McSPI3_CLK(mode=1)<br>GPIO_130(mode=4)
| WIFI-&gt;Black: available in OMAP3530/BT combo:WIFI|-| 4 | MCBSP3_DX | MCBSP3_DX (mode=0) | Transmitted serial Data (BT audio) | UART2_CTS(mode=1)<br>GPIO_140(mode=4) DM3730
| TPS65950: PCM VSP |-| 6 | MCBSP3_CLKX | MCBSP3_CLKX(mode&gt;<font color=0) | Transmitted serial Clock (BT audio) | UART2_TX(mode=1)"red">Red<br/font>GPIO_142(mode=4) : available in OMAP3530
| BT/TPS65950: PCM VSP|-| 8 | MCBSP3_FSX | MCBSP3_FSX (mode&gt;<font color=0) | Transmited Frame Syncronisation (BT audio) | UART2_RX(mode=1)"blue">Blue<br/font>GPIO_143(mode=4) : available in DM3730
*"'''Share with'''", some pads are connected with external peripherals. See [[Mux configuration#Configure_Mux| BT/TPS65950: PCM VSP|-| 10 | MCBSP3_DR | MCBSP3_DR (mode=0) | Received Serial Data (BT audio) | UART2_RTS(mode=1)<br>GPIO_141(mode=4) this page]] for more information
| TPS65950: PCM VSP
|-
| 12
| MCBSP1_DX
| GPIO_158(mode=4)
| -
|
MCBSP1_DX(mode=0)<br>McSPI4_SIMO(mode=1)<br>McBSP3_DX(mode=2)
 
| -
|-
| 14
| MCBSP1_CLKX
| GPIO_162(mode=4)
| -
|
MCBSP1_CLKX(mode=0)<br>McBSP3_CLKX(mode=2)
 
| -
|-
| 16
| MCBSP1_FSX
| GPIO_161(mode=4)
| -
|
MCBSP1_FSX(mode=0)<br>McSPI4_CS0(mode=1)<br>McBSP3_FSX(mode=2)
 
| -
|-
| 18
| MCBSP1_DR
| GPIO_161(mode=4)
| -
|
MCBSP1_DR(mode=0)<br>McSPI4_SOMI(mode=1)<br>McBSP3_DR(mode=2)
 
| -
|-
| 20
| MCBSP1_CLKR
| GPIO_156(mode=4)
| -
| MCBSP1_CLKR(mode=0)
| -
|-
| 22
| MCBSP1_FSR
| GPIO_157(mode=4)
| -
| MCBSP1_FSR(mode=0)
| -
|-
| 23
| I2C2_SDA
| I2C2_SDA(mode=0)
| I2C Data
| GPIO_183(mode=4)
| CAM if configured via hardware: RC14
|-
| 24
| I2C2_SCL
| I2C2_SCL(mode=0)
| I2C Clock
| GPIO_168(mode=4)
| CAM if configured via hardware: RC13
|-
| 25
| REGEN
| -
| Master/Slave control power TPS65950
| -
| -
|-
| 26
| nRESET
| -
| Read Reset Omap
| -
| -
|-
| 27
| GND
| -
| GND
| -
| -
|-
| 28
| GND
| -
| GND
| -
| -
|}
 
<br>
 
=== J960 connector ===
 
This connector is used mainly to connect via serie to IGEP Software using [http://en.wikipedia.org/wiki/RS-232 RS232 standard].
 
On IGEPv2 revision B:
 
*This J960 connector has only Debug RS232 interface
*So, it is needed null modem configuration (direct connection between two computers). RX and TX lines are crossed in this null modem configuration between two equipments (TX1-&gt;RX2 / TX2-&gt;RX1).
 
On IGEPv2 revision C:
 
*You should modify your serial debug cable in order not to damage your serial PC port.&nbsp;
*Additional RS232 port (UART1) on same J960 connector. It is only needed to&nbsp; rotate 180o the IDC-10 (AT-Everex) to DB9 cable.
*It has been added resistors for alternative UART1, UART2 and UART3 hardware selection.
*See [[How to use UARTs#RS232_Schematic_Igep_V2|Schematics]] (RC) for more information.
 
{| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 308px;"
|-
| Pad
| Connect to
| &nbsp; Main peripheral
| Main utility
| Other available peripherals (only via hardware)
|
Share with
 
|-
| 1
| -
| -
| -
| -
| -
|-
| 2
| RS232_RX2
| UART3_RX(R966)
| Serial debug
| UART2_RX(R952) only RC
| SN65C3232EPW
|-
| 3
| RS232_TX2
| UART3_TX(R965)
| Serial debug
| UART2_TX(R947) only RC
| SN65C3232EPW
|-
| 4
| -
| -
| -
| -
| -
|-
| 5
| GND
| -
| GND
| -
| -
|-
| 6
| GND
| -
| GND
| -
| -
|-
| 7
| -
| -
| -
| -
| -
|-
| 8
| RS232_TX1
| UART1_TX(R961)
| SN65C3232EPW
| UART3_TX(R940) only RC
| SN65C3232EPW
|-
| 9
| RS232_RX1
| UART1_RX(R962)
| SN65C3232EPW
| UART3_RX(R942) only RC
| SN65C3232EPW
|-
| 10
| -
| -
| -
| -
| -
|}
<br>
=== J940 connector === This connector is used mainly to connect via RS485 (UART1) with other devices. User can use this connector to power the board with 5VDC. Use only 5V regulated DC.The IGEPv2 BOARD does not use this 9v power supply. Only on IGEPv2 revision B, the PWR_9V input is directly routed to JC01 and J971 connectors. On IGEPv2 revision C is not available. {| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 104px;"|-| Pad | Connect to | &nbsp; Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | PWR_GND | GND | -| - | -|-| 2 | PWR_5V | Power 5v| -| - | -|-| 3 | PWR_9V | Power 9v| -| - | -|-| 4 | RS485_A | UART3_RX/UART3_TX | A aka '−' aka TxD-/RxD- aka inverting pin | - | TXS0102DCUR|-| 5 | RS485_B | UART3_RX/UART3_TX | B aka '+' aka TxD+/RxD+ aka non-inverting pin | - | TXS0102DCUR|}<br>  === J400 connector === J400 is used to [http://en.wikipedia.org/wiki/Jtag JTAG] (Joint Test Action Group). JTAG is a standardized serial protocol widely used in printed circuit boards. Its main functions are: *Debug the software of an embedded system directly *Storing firmware *Boundary scan testing JTAG Suggested:  *JTAG Debugger XDS510+ USB from Spectrum Digital with Code Composer Studio 3.3 or higher. *JTAG Debugger XD100v2 USB from Spectrum Digital with Code Composer Studio 4 or higher. {| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 104px;"|-| Pad | Connect to | &nbsp; Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | JTAG_TMS | JTAG_TMS| | - | -|-| 2 | JTAG_NTRST | JTAG_NTRST| | - | -|-| 3 | JTAG_TDI | JTAG_TDI| | - | -|-| 4 | GND | - | GND | - | -|-| 5 | 1V8 | Power 1V8| | - | -|-| 6 | - | - | | - | -|-| 7 | JTAG_TD0 | JTAG_TD0| | - | -|-| 8 | GND | - | GND | - | -|-| 9 | JTAG_RTCK | JTAG_RTCK| | - | -|-| 10 | GND | - | GND | - | -|-| 11 | JTAG_TCK | JTAG_TCK| | - | -|-| 12 | GND | - | GND | - | -|-| 13 | JTAG_EMU0 | JTAG_EMU0(mode=0)| | GPIO_11(mode=4) | -|-| 14 | JTAG_EMU1 | JTAG_EMU1(mode=0)| | GPIO_31(mode=4) | -|}<br>  === J970 connector === J970 is used to implement a keypad, it is connected to TPS65950. The keypad interface controller provides an enhanced keypad decode capability and simultaneously reduces host processor software overhead. When a key button of the keyboard matrix is pressed the corresponding row and column lines are shorted together. To allow key press detection, all input pins (KBR) are pulled up to VCC and all output pins (KBC) driven to a low level.Any action on a button generates an interrupt to the sequencer.The decoding sequence is written to allow detection of simultaneous press actions on several key buttons.  More information in [http://www.ti.com/product/tps65950 TPS65950] datasheets. TPS65950 send via I2C1 all the interrupt request.  {| cellspacing="1" cellpadding="1" border="1" style="width: 698px; height: 216px;"|-| *Can handle up to 8 x 8 keypads, IGEPv2 can handle up to 4 x 4 keypads. *Optionally, you can decode via Omap software. *Event detection on key press and key release. *Multikey press detection, can detect up 2&nbsp; keys at the same time. *Long-key detection on prolonged key press. *Programmable time-out on permanent key press or after keypad release. | [[Image:Igep keypad.png]]|} {| cellspacing="1" cellpadding="1" border="1" style="width: 698px; height: 300px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | KPD_CO | KPD_CO | Keypad controler Column 0 | - | -|-| 2 | KPD_C1 | KPD_C1 | Keypad controler Column 1 | - | -|-| 3 | KPD_C2 | KPD_C2 | Keypad controler Column 2 | - | -|-| 4 | KPD_C3 | KPD_C3 | Keypad controler Column 3 | - | -|-| 5 | KPD_RO | KPD_RO | Keypad controler Row 0 | - | -|-| 6 | KPD_R1 | KPD_R1 | Keypad controler Row 1 | - | -|-| 7 | KPD_R2 | KPD_R2 | Keypad controler Row 2 | - | -|-| 8 | KPD_R3 | KPD_R3 | Keypad controler Row 3 | - | -|}<br>  === JC30 connector === These connectors allow the access to the Camera interface signals. Omap has the processing capability to connect RAW image-sensor modules via this connector. <br>  {| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 104px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | CAM_HS | GPIO_94(mode=4) | - | CAM_HS(mode=0) | -|-| 2 | CAM_VS | GPIO_95(mode=4) | - | CAM_VS(mode=0) | -|-| 3 | CAM_XCLKA | CAM_XCLKA(mode=0) | Camera interface | GPIO_96(mode=4) | -|-| 4 | GND | - | GND | - | -|-| 5 | CAM_PCLK | CAM_PCLK(mode=0) | Camera interface | GPIO_97(mode=4) | -|-| 6 | GND | - | GND | - | -|-| 7 | CAM_DO | GPIO_99(mode=4) | - | CAM_DO(mode=0) | -|-| 8 | CAM_FLD | GPIO_98(mode=4) | - | CAM_FLD(mode=0) | -|-| 9 | CAM_D2 | CAM_D2(mode=0) | Camera interface | GPIO_101(mode=4) | -|-| 10 | CAM_D1 | GPIO_100(mode=4) | - | CAM_D1(mode=0) | -|-| 11 | CAM_D4 | CAM_D4(mode=0) | Camera interface | GPIO_103(mode=4) | -|-| 12 | CAM_D3 | CAM_D3(mode=0) | Camera interface | GPIO_102(mode=4) | -|-| 13 | CAM_D6 | GPIO_105(mode=4) | - | GPIO_105(mode=4) | -|-| 14 | CAM_D5 | CAM_D5(mode=0) | Camera interface | GPIO_104(mode=4) | -|-| 15 | CAM_D8 | GPIO_107(mode=4) | - | CAM_D8(mode=0) | -|-| 16 | CAM_D7 | GPIO_106(mode=4) | - | CAM_D7(mode=0) | -|-| 17 | CAM_D10 | CAM_D10(mode=0) | Camera interface | GPIO_109(mode=4) | -|-| 18 | CAM_D9 | GPIO_108(mode=4) | - | CAM_D9(mode=0) | -|-| 19 | CAM_XCLKB | CAM_XCLKB(mode=0) | Camera interface | GPIO_111(mode=4) | -|-| 20 | CAM_D11 | CAM_D11(mode=0) | Camera interface | GPIO_110(mode=4) | -|-| 21 | GPIO_112/I2C2_SCL | GPIO_112(RC11) | - | I2C2_SCL(RC13) | -|-| 22 | GPIO_113/I2C2_SDA | GPIO_113(RC12) | - | I2C2_SDA(RC14) | -|-| 23 | CAM_RESET | GPIO_114(mode=4) | Input | CAM_RESET(mode=0) | -|-| 24 | CAM_PDN | GPIO_115(mode=4) | Input | CAM_PDN(mode=0) | -|-| 25 | CAM_STROBE | CAM_STROBE(mode=0) | Camera interface | GPIO_126(mode=4) | -|-| 26 | CAM_WEN | GPIO_167(mode=4) | - | CAM_WEN(mode=0) | -|-| 27 | 3V3 | - | Power 3V3 | - | -|-| 28 | 3V3 | - | Power 3V3 | - | -|} <br> === TFT CONNECTORS: JA41-JA42 === These connectors allow the access to the LCD signals.The output signal is shared by HDMI-A ==== JA41 connector ==== JA41 is used for DVI (Digital Video Interface) data part.  IGEPv2 RB version:  *Available only the first 20 pads IGEPv2 RC version:  *Available 28 pads {| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 669px; height: 1064px;"|-| Pad: | Connect to | Main peripheral | Main utility | Other available peripherals | Share with|-| 1 | VIO 3V3 | - | Power 3v3 | - | -|-| 2 | GND | - | GND | - | -|-| 3 | DVI_DATA0 | DSS_D0(mode=0) | LCD&nbsp;pixel data bit | UART1_CTS(mode=2)<br>GPIO_70(mode=4)  | TFP410|-| 4 | DVI_DATA1 | DSS_D1(mode=0) | LCD&nbsp;pixel data bit | UART1_RTS(mode=2)<br>GPIO_71(mode=4)  | TFP410|-| 5 | DVI_DATA2 | DSS_D2(mode=0) | LCD&nbsp;pixel data bit | GPIO_72(mode=4) | TFP410|-| 6 | DVI_DATA3 | DSS_D3(mode=0) | LCD&nbsp;pixel data bit | GPIO_73(mode=4) | TFP410|-| 7 | DVI_DATA4 | DSS_D4(mode=0) | LCD&nbsp;pixel data bit | UART3_RX(mode=2)<br>GPIO_74(mode=4)  | TFP410|-| 8 | DVI_DATA5 | DSS_D5(mode=0) | LCD&nbsp;pixel data bit | UART3_TX(mode=2)<br>GPIO_75(mode=4)
| TFP410|-| 9 | DVI_DATA6 | DSS_D6(mode=0) | LCD&nbsp;pixel data bit | UART1_TX(mode=2)<br>GPIO_76(mode=4)  | TFP410|-| 10 | DVI_DATA7 | DSS_D7(mode=0) | LCD&nbsp;pixel data bit | UART1_RX(mode=2)<br>GPIO_77(mode=4)  | TFP410|-| 11 | DVI_DATA8 | DSS_D8(mode=0) | LCD&nbsp;pixel data bit | GPIO_78(mode=4) | TFP410|-| 12 | DVI_DATA9 | DSS_D9(mode=0) | LCD&nbsp;pixel data bit | GPIO_79(mode=4) | TFP410|-| 13 | DVI_DATA10 | DSS_D10(mode=0) | LCD&nbsp;pixel data bit | GPIO_80(mode=4) | TFP410|-| 14 | DVI_DATA11 | DSS_D11(mode=0) | LCD&nbsp;pixel data bit | GPIO_81(mode=4) | TFP410|-| 15 | DVI_DATA12 | DSS_D12(mode=0) | LCD&nbsp;pixel data bit | GPIO_82(mode=4) | TFP410|-| 16 | DVI_DATA13 | DSS_D13(mode=0) | LCD&nbsp;pixel data bit | GPIO_83(mode=4) | TFP410|-| 17 | DVI_DATA14 | DSS_D14(mode=0) | LCD&nbsp;pixel data bit | GPIO_84(mode=4) | TFP410|-| 18 | DVI_DATA15 | DSS_D15(mode=0) | LCD&nbsp;pixel data bit | GPIO_85(mode=4) | TFP410|-| 19 | DVI_DATA16 | DSS_D16(mode=0) | LCD&nbsp;pixel data bit | GPIO_86(mode=4) | TFP410|-| 20 | DVI_DATA17 | DSS_D17(mode=0) | LCD&nbsp;pixel data bit | GPIO_87(mode=4) | TFP410|-| 21 | DVI_DATA18 | DSS_D18(mode=0) | LCD&nbsp;pixel data bit | DSS_D0 (mode=3)<br>MCSPI3_CLK(mode=2)<br>GPIO_88(mode=4)  | TFP410|-| 22 | DVI_DATA19 | DSS_D19(mode=0) | LCD&nbsp;pixel data bit | DSS_1 (mode=3)<br>MCSPI3_SIMO(mode=2)<br>GPIO_89(mode=4)  | TFP410|-| 23 | DVI_DATA20 | DSS_D20(mode=0) | LCD&nbsp;pixel data bit | DSS_D2 (mode=3)<br>MCSPI3_SOMI(mode=2)<br>GPIO_90(mode=4)  | TFP410|-| 24 | DVI_DATA21 | DSS_D21(mode=0) | LCD&nbsp;pixel data bit | DSS_D3 (mode=3)<br>MCSPI3_CSO(mode=2)<br>GPIO_91(mode=4)  | TFP410|-| 25 | DVI_DATA22 | DSS_D22(mode=0) | LCD&nbsp;pixel data bit | DSS_D4 (mode=3)<br>MCSPI3_CS1(mode=2)<br>GPIO_92(mode=4)  | TFP410|-| 26 | DVI_DATA23 | DSS_D23(mode=0) | LCD&nbsp;pixel data bit | DSS_D5(mode=3)<br>GPIO_93(mode=4)  | TFP410|-| 27 | I2C3_SCL | I2C3_SCL(mode=0) | I2C3 interface | GPIO_184(mode=4) | TXS0102DCUR|-| 28 | I2C3_SDA | I2C3_SDA(mode=0) | I2C3 interface | GPIO_185(mode=4) | TXS0102DCUR|} <br> TFP410: converts DVI signal to HDMI  TXS0102DCUR: Increse I2c3 voltage to 5V to read EDID information <br> ==== JA42 connector ==== JA42 is used for DVI (Digital Video Interface) control part, TouchScreen control and SPI1.  The current available on the DC_5V rail is limited to the available current that remains from the DC supply that is connected to the DC power jack on the board. Keep in mind that some of that power is needed by the USB Host power rail and if more power is needed for the expansion board, the main DC power supply current capability may need to be increased. All signals are 1.8V except the DVI_PUP which is a 3.3V signal. The 1.8V rail is for level translation only and should not be used to power circuitry on the board. The 3.3V rail also has limited capacity on the power as well. It is suggested that the 5V rail be used to generate the required voltages for an adapter card. <br>  {| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width{#lst: 804px; heightCategory: 343px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with|-| 1 | VIO 1V8 | - | Power 1v8 | - | -|-| 2 | SYS_BOOT5 | GPIO_7(mode=4) | Omap boot config | MMC2_DIR_DAT(mode=1)<br>SYS_BOOT5(mode=0)  | -|-| 3 | DC_5V | - | Power 5v | - | -|-| 4 | GND | - | GND | - | -|-| 5 | SYS_BOOT0 | GPIO_2(mode=4) | Omap boot config | SYS_BOOT0(mode=0) | -|-| 6 | SYS_BOOT1 | GPIO_3(mode=4) | Omap boot config | SYS_BOOT1(mode=0) | -|-| 7 | DVI_VSYNC | DSS_VSYNC(mode=0) | LCD&nbsp;vertical sync (Expansion) | GPIO_68(mode=4) | TFP410|-| 8 | DVI_HSYNC | DSS_HSYNC(mode=0) | LCD Horitzontal sync (Expansion) | GPIO_67 (mode=4) | TFP410|-| 9 | DVI_ACBIAS | DSS_ACBIAS(mode=0) | LCD Control (Expansion) | GPIO_133(mode=4) | TFP410|-| 10 | DVI_PUP | - | Control signal for DVI controler (Expansion) | - | TFP410|-| 11 | DVI_PCLK | DSS_PCLK(mode=0) | LCD clock (Expansion) | GPIO_66 (mode=4) | TFP410|-| 12 | TS_nPEN_IRQ | GPIO_175(mode=4) | Touchscreen control (Expansion) | McSPI1_CS1(mode=0) | -|-| 13 | LCD_QVGA/nVGA | GPIO_154(mode=4) | Touchscreen control (Expansion) | McBSP4_DX(mode=0) | -|-| 14 | LCD_ENVDD | GPIO_153(mode=4) | Touchscreen control (Expansion) | McBSP4_DR(mode=0) | -|-| 15 | LCD_RESB | GPIO_155(mode=4) | Touchscreen control (Expansion) | McBSP4_FSX(mode=0) | -|-| 16 | LCD_INI | GPIO_152(mode=4) | Touchscreen control (Expansion) | McBSP4_CLKX(mode=0) | -|-| 17 | MCSPI1_CLK | McSPI1_CLK(mode=0) | Touchscreen control (Expansion) | GPIO_171 (mode=4) | -|-| 18 | MCSPI1_SIMO | McSPI1_SIMO(mode=0) | Touchscreen control (Expansion) | GPIO_172 (mode=4) | -|-| 19 | MCSPI1_CS0 | McSPI1_CS0(mode=0) | Touchscreen control (Expansion) | GPIO_174 (mode=4) | -|-| 20 | MCSPI1_SOMI | McSPI1_SOMI(mode=0) | Touchscreen control (Expansion) | GPIO_173 (mode=4) | -IGEP0020|IGEP0020 expansion connectors}} <br> TFP410: converts DVI signal to HDMI
== IGEP MODULE ==
{| cellspacing="1" cellpadding="1" border="1" align="center" width="200"|-| [[Image:Module description small.jpg]]|} <br>'''NOTE: By default, J7 connector is not mounted'''  Table information:  *'''Pad''' number. See PCB. *"'''Connect to'''" is a name used in schematics, usually it will be default peripheral name (mode=0) *IGEP '''main peripheral''' *'''Main utility''' *'''Other available peripherals'''. See this page for more information *"'''Share with'''" is alternate configuration for pad. See this page for more information === J1 connector === {| cellspacing="1" cellpadding="1" border="1" style="width#lst: 674px; heightCategory: 104px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | nRESET | | - | | -|-| 2 | DSS_D1 | | LCD pixel data bit | | -|-| 3 | DSS_D0 | | LCD pixel data bit | | -|-| 4 | DSS_D3 | - | LCD pixel data bit | - | -|-| 5 | DSS_D5 | | LCD pixel data bit | | -|-| 6 | DSS_D2 | - | LCD pixel data bit | - | -|-| 7 | DSS_D4 | | LCD pixel data bit | | -|-| 8 | GPIO10_SYSCLK1 | | - | | -|-| 9 | GPIO00_SYSnIRQ0 | | | | -|-| 10 | GPIO185_I2C3_SDA | | - | | J5|-| 11 | DSS_D10 | | LCD pixel data bit | | -|-| 12 | DSS_D11 | | LCD pixel data bit | | -|-| 13 | GPIO184_I2C3_SCL | | - | | J5|-| 14 | GPIO186_SYSCLK2 | | | | -|-| 15 | DSS_D22 | | LCD pixel data bit | | -|-| 16 | GPIO147_GPT8_PWM | | - | | -|-| 17 | DSS_D13 | | LCD pixel data bit | | -|-| 18 | GPIO144_GPT9_PWM | | - | | -|-| 19 | DSS_D14 | | LCD pixel data bit | | -|-| 20 | DSS_D15 | | LCD pixel data bit | | -|-| 21 | GPIO146_GPT11_PWM | | - | | -|-| 22 | GPIO163_IR_CTS3 | | - | | -|-| 23 | DSS_D21 | | LCD pixel data bit | | -|-| 24 | DSS_D17 | | LCD pixel data bit | | -|-| 25 | DSS_D18 | | LCD pixel data bit | | -|-| 26 | GPIO166_IR_TXD3 | | - | | -|-| 27 | DSS_D19 | - | LCD pixel data bit | - | -|-| 28 | DSS_D9 | | LCD pixel data bit | | -|-| 29 | DSS_D7 | - | LCD pixel data bit | - | -|-| 30 | DSS_D8 | - | LCD pixel data bit | - | -|-| 31 | GPIO165_IR_RXD3 | - | | - | -|-| 32 | GPIO66_DSS_PCLK | - | | - | -|-| 33 | DSS_D6 | - | LCD pixel data bit | - | -|-| 34 | GPIO68_DSS_VSYNC | - | | - | -|-| 35 | GPIO67_DSS_HSYNC | - | | - | -|-| 36 | PMIC_USBOTG_DP | - | | - | -|-| 37 | PMIC_USBOTG_DN | - | | - | -|-| 38 | PMIC_AUXL | - | | - | -|-| 39 | PMIC_MIC_SUB_M | - | | - | -|-| 40 | PMIC_ADCIN4 | - | | - | -|-| 41 | PMIC_AUXR | - | | - | -|-| 42 | PMIC_PWM0 | - | | - | -|-| 43 | GPIO69_DSS_ACBIAS | - | | - | -|-| 44 | DSS_D16 | - | LCD pixel data bit | - | -|-| 45 | DSS_D20 | - | LCD pixel data bit | - | -|-| 46 | PMIC_USBOTG_ID | - | | - | -|-| 47 | GPIO170_HDQ_1WIRE | - | | - | -|-| 48 | PMIC_ADCIN3 | - | | - | -|-| 49 | PMIC_PWM1 | - | | - | -|-| 50 | GND | - | GND | - | -|-| 51 | PMIC_ADCIN5 | - | | - | -|-| 52 | PMIC_VBACKUP | - | | - | -|-| 53 | PMIC_ADCIN6 | - | | - | -|-| 54 | PMIC_USBOTG_VBUS | - | | - | -|-| 55 | GPIO145:GPT10_PWM | - | | - | -|-| 56 | GND | - | GND | - | -|-| 57 | PMIC_MIC_MAIN | - | | - | -|-| 58 | PMIC_ADCIN2 | - | | - | -|-| 59 | J1_SYSEN | - | | - | -|-| 60 | DSS_D12 | - | LCD pixel data bit | - | -|-| 61 | DSS_D23 | - | LCD pixel data bit | - | -|-| 62 | GPIO15_MCSPI3_SOMI | - | | - | -|-| 63 | GPIO164_RTS3 | - | | - | -|-| 64 | PMIC_ADCIN7 | - | | - | -|-| 65 | PMIC_PWRON | - | | - | -|-| 66 | VBAT | - | Board supply: 3V5-4V2 | - | -|-| 67 | VBAT | - | Board supply: 3V5-4V2 | - | -|-| 68 | PMIC_HSOL | - | | - | -|-| 69 | PMIC_HSOR | - | | - | -|-| 70 | GND | - | GND | - | -IGEP0030|IGEP0030 expansion connectors} === J4 connector === '''NOTE:''' "<strike>cross out</strike>" marked function names you should not use them  {| cellspacing="1" cellpadding="1" border="1" style="width: 764px; height: 2880px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | VBAT | - | Board supply: 3V5-4V2 | | |-| 2 | VBAT | - | Board supply: 3V5-4V2 | - | -|-| 3 | GND | - | GND | - | -|-| 4 | GPMC_nCS5 | GPMC_nCS5(mode=0) | General purpose memory controller | - | -|-| 5 | GPMC_nCS4 | GPMC_nCS4(mode=0) | General purpose memory controller | | -|-| 6 | GPMC_nWE | GPMC_nWE | General purpose memory controller | - | -|-| 7 | GPMC_nADV_ALE | GPMC_nADV | General purpose memory controller | - | -|-| 8 | GPMC_nOE | GPMC_nOE | General purpose memory controller | - | -|-| 9 | GPIO65_ETH1_IRQ1 | | - | | -|-| 10 | GPIO64_ETH0_NRESET | | - | | -|-| 11 | GPMC_A2 | GPMC_A2(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 12 | GPMC_A8 | GPMC_A8(mode=0) | General purpose memory controller | HSUBS1_STP(mode=3)| Used in the IGEP COM PROTON|-| 13 | GPMC_A5 | GPMC_A5(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 14 | GPMC_A7 | GPMC_A7(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 15 | GPMC_D2 | GPMC_D2(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 16 | GPMC_D10 | GPMC_D10(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 17 | GPMC_D3 | GPMC_D3(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 18 | GPMC_D11 | GPMC_D11(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 19 | GPMC_D4 | GPMC_D4(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 20 | GPMC_D12 | GPMC_D12(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 21 | GPMC_D5 | GPMC_D5(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 22 | GPMC_D15 | GPMC_D15(mode=0) | General purpose memory controller | | Used in the IGEP COM PROTON|-| 23 | GPIO13_MMC3_CMD | HSUBS1_CLK(mode=3)| | | -|-| 24 | GPIO148_TXD1 | | | | -|-| 25 | GPIO176_SPI1_CS2 | | | | -|-| 26 | GPIO18_MMC3_D0 | HSUBS1_DATA4(mode=3)| - | | -|-| 27 | GPIO174_SPI1_CS2 | - | | - | -|-| 28 | GPIO53_GPMC_nCS2 | GPIO_53(mode=4) | - | | -|-| 29 | GPIO14_MMC3_D4 | HSUBS1_DATA0(mode=3)| | - | -|-| 30 | GPIO21_MMC3_D7 | HSUBS1_DATA3(mode=3)| | - | -|-| 31 | GPIO17_MMC3_D3 | HSUBS1_DATA7(mode=3)| | - | -|-| 32 | HUSBH_VBUS | - | | - | -|-| 33 | GND | - | GND | - | -|-| 34 | HSUSB_DP | - | | - | -|-| 35 | HSUSB_DM | - | | - | -|-| 36 | GPIO19_MMC3_D1 | HSUBS1_DATA5(mode=3)| | - | -|-| 37 | GPIO22_MMC3_D6 | -| -| - | -|-| 38 | GPIO23_MMC3_D5 | HSUBS1_NXT(mode=3)| | - | -|-| 39 | GPIO20_MMC3_D2 | HSUBS1_DATA6(mode=3)| | - | -|-| 40 | GPIO12_MMC3_CLK | | | - | -|-| 41 | GPIO114_SPI1_NIRQ | - | | - | -|-| 42 | GPIO175_SPI1_CS1 | - | | - | -|-| 43 | GPIO171_SPI1_CLK | - | | - | -|-| 44 | GPIO172_SPI1_SIMO | - | | - | -|-| 45 | GPIO173_SPI1_SOMI | - | | - | -|-| 46 | GPIO149_MMC3_CD | - | | - | -|-| 47 | GPIO150_MMC3_WP | - | | - | -|-| 48 | GPIO151_RXD1 | - | | - | -|-| 49 | GPMC_D7 | GPMC_D7(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 50 | GPMC_D14 | GPMC_D14(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 51 | GPMC_D6 | GPMC_D6(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 52 | GPMC_D13 | GPMC_D13(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 53 | GPMC_D1 | GPMC_D1(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 54 | GPMC_D8 | GPMC_D8(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 55 | GPMC_D9 | GPMC_D9(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 56 | GPMC_D0 | GPMC_D0(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 57 | GPMC_A6 | GPMC_A6(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 58 | GPMC_A1 | GPMC_A1(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 59 | GPMC_A3 | GPMC_A3(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 60 | GPMC_A10 | GPMC_A10(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 61 | GPMC_A4 | GPMC_A4(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 62 | GPMC_A9 | GPMC_A9(mode=0) | General purpose memory controller | - | Used in the IGEP COM PROTON|-| 63 | GPMC_nWP | GPMC_nWP(mode=0) | General purpose memory controller | - | -|-| 64 | GPMC_nCS1 | GPMC_nCS1(mode=0) | General purpose memory controller | - | -|-| 65 | GPMC_nBE0_CLE | GPMC_nBEO(mode=0) | General purpose memory controller | - | -|-| 66 | GPMC_nCS0 | GPMC_nCS0(mode=0) | General purpose memory controller | - | -|-| 67 | GPMC_nCS6 | GPMC_nCS6(mode=0) | General purpose memory controller | - | -|-| 68 | GPMC_WAIT0 | GPMC_WAIT0(mode=0) | General purpose memory controller | - | -|-| 69 | GPMC_nBE1 | GPMC_nBE1(mode=0) | General purpose memory controller | - | -|-| 70 | GPMC_CLK | GPMC_CLK(mode=0) | General purpose memory controller | - | -|} === J5 connector === OMAP3 processor family has Camera Image Signal Processing (ISP) interface. ISP interface could to be connecting to CCD and CMOS image sensors.  Detailed features of ISP are:  *CCD and CMOS Imager Interface *Memory Data Input *BT.601/BT.656 Digital YCbCr 4:2:2 (8-/10-Bit) Interface *Glueless Interface to Common Video Decoders *Resize Images From 1/4x to 4x *Separate Horizontal/Vertical Control The signals of connector J5 are connected directly to the processor.  {| cellspacing="1" cellpadding="1" border="1" style="width: 674px; height: 104px;"|-| Pad | Connect to | Main peripheral | Main utility | Other available peripherals | Share with  |-| 1 | GPIO94_CAM_HS | GPIO_94(mode=4) | - | CAM_HS(mode=0) | -|-| 2 | GPIO95_CAM_VS | GPIO_95(mode=4) | - | CAM_VS(mode=0) | -|-| 3 | GPIO96_CAM_XCLKA | CAM_XCLKA(mode=0) | Camera interface | GPIO_96(mode=4) | -|-| 4 | GPIO97_CAM_PCLK | CAM_PCLK(mode=0) | Camera interface | GPIO_97(mode=4) | -|-| 5 | GPIO98_CAM_FLD | GPIO_98(mode=4) | - | CAM_FLD(mode=0) | -|-| 6 | GPIO99_CAM_D0 | GPIO_99(mode=4) | - | CAM_D0(mode=0) | -|-| 7 | GPIO100_CAM_D1 | GPIO_100(mode=4) | - | CAM_D1(mode=0) | -|-| 8 | GPIO101_CAM_D2 | CAM_D2(mode=0) | Camera interface | GPIO_101(mode=4) | -|-| 9 | GPIO102_CAM_D3 | CAM_D3(mode=0) | Camera interface | GPIO_102(mode=4) | -|-| 10 | GPIO103_CAM_D4 | CAM_D4(mode=0) | Camera interface | GPIO_103(mode=4) | -|-| 11 | GPIO104_CAM_D5 | CAM_D5(mode=0) | Camera interface | GPIO_104(mode=4) | -|-| 12 | GPIO105_CAM_D6 | GPIO_105(mode=4) | - | CAM_D6(mode=0) | -|-| 13 | GPIO106_CAM_D7 | GPIO_106(mode=4) | - | CAM_D7(mode=0) | -|-| 14 | GPIO107_CAM_D8 | GPIO_107(mode=4) | - | CAM_D8(mode=0) | -|-| 15 | GPIO108_CAM_D9 | GPIO_108(mode=4) | - | CAM_D9(mode=0) | -|-| 16 | GPIO109_CAM_D10 | CAM_D10(mode=0) | Camera interface | GPIO_109(mode=4) | -|-| 17 | GPIO110_CAM_D11 | CAM_D11(mode=0) | Camera interface | GPIO_110(mode=4) | -|-| 18 | GPIO111_CAM_XCLKB | CAM_XCLKB(mode=0) | Camera interface | GPIO_111(mode=4) | -|-| 19 | GPIO167_CAM_WEN | GPIO_167(mode=4) | - | CAM_WEN(mode=0) | -|-| 20 | GPIO126_CAM_STROBE | CAM_STROBE(mode=4) | Camera interface | GPIO_126(mode=4) | -|-| 21 | VIO_1V8 | - | Power 1V8 | - | -|-| 22 | PMIC_SYSEN | - | Control Slave power ICs | - | TPS65950: CONTROL|-| 23 | GND | - | GND | - | -|-| 24 | VBAT | - | Board supply: 3V5-4V2 | - | -|-| 25 | GPIO63_CAM_IRQ | - | Camera interface | - | -|-| 26 | GPIO184_I2C3_SCL | I2C3_SCL(mode=0) | I2C Clock | GPIO_184(mode=4) | J1|-| 27 | GPIO185_I2C3_SDA | I2C3_SDA(mode=0) | I2C Data | GPIO_185(mode=4) | J1|}
'''Under construction'''[[Category:Peripherals]]
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