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= Overview =
This wiki is meant to be a starting point for people to learn configure mux for IGEP devices as quickly and easily as possible. This wiki contains:<br>
*Mux characteristics summary
*Tips to avoid problems
*Ways to configure mux
*Tables that links peripherals and connectors for IGEPv2 and IGEP MODULE
There are three ways to configure mux in IGEP Boards based in OMAP35xx and DM37xx:<br>
*[[Mux_instructions|Configuring MUX from OS User Space]]. This mode has a issue, when your system reboot or shutdown you will need to configure again. [[How to set up UART2 in J990#First_way|Example]].
*Configuring MUX by using kernel commandline buddies. This way is not avaliable in some cases. [[How to set up UART2 in J990#Second_way|Example]] and [[Linux Kernel 2.6.37.y#Kernel_Parameters|buddies parametres]].<br>
*Editing and compile kernel sources. [[How to set up UART2 in J990#Third_way|Example]].<br>
= Introduction =
Mux (or multiplexer) is a Omap peripheral that can be controlled via software. Its function is connect other peripherals to some available Omap pins.
The functional bits of a pad configuration register field are divided into the following five fields:
• '''MUXMODE ''' (3 bits) defines the multiplexing mode applied to the pin. A mode corresponds to the selection of the functionality mapped on the pin with six (0 to 5) possible functional modes for each pin.
• '''PULL ''' (2 bits) for combinational pullup/pulldown configuration:
-> PULLTYPESELECT: Pullup/pulldown selection for the pin.
-> PULLUDENABLE: Pullup/pulldown enable for the pin.
• '''INPUTENABLE ''' (1 bit) drives an input enable signal to the I/O CTRL. -> INPUTENABLE = 0: Input Disable. Pin is configured in output only mode.
->OFFENABLE: Off mode pin state override control. Set to 1 to enable the feature and to 0 to disable it.
->OFFPULLTYPESELECT: Off mode pullup/pulldown selection.
• '''Wake-up ''' bits (2 bits):
->WAKEUPENABLE: Enable wake-up detection on input. It is also the off mode input enable value.<br> ->WAKEUPEVENT: Wake-up event status for the pin.'''<br>'''
{| cellspacing="1" cellpadding="1" border="1" align="center" width="200"
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| [[Image:Mux pad configuration diagram.png]]
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{| cellspacing="1" cellpadding="1" border="1" style="width: 287px; height: 235px;"
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The next tables show you table shows all the mux capabilities: .
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| Pad: PULLTYPESELECT | Connect to: PULLUDENABLE | Default peripheral (mode=0) | Default function: | Other available peripherals: | style="text-align: left;" | Share with:Pin Behavior
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| 1 0b0 | VIO 1V8 0b0 | Pull- | Power 1v8 | - | -<br>down selected but not activated
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| 2 0b0 | DC 5V 0b1 | Pull- | Power 5v | - | -<br>down selected and activated if pin is NOT configured as OUTPUT
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| 3 0b1 | MMC2_DAT7 0b0 | MMC2_DAT7 | Reset Wlan | MMC2_CLKIN(mode=1) MMC3_DAT3(mode=3) GPIO_139(mode=4) | <div align="JUSTIFY">'''Wlan:''' This pad can reset Wlan peripheral using Omap GPIO low level (GND). If you reset continuously Wlan all their pads are in High Impedance. Also you can disable Wlan from J990 low level.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use it.'''(1)'''</div>Pull-up selected but not activated
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| 5 0b1 | MMC2_DAT6 0b1 | MMC2_DAT6 | Power down Wlan | MMC2_DIR_CMD(mode=1) MMC3_DAT2(mode=3) GPIO_138(mode=4) | <div align="JUSTIFY">'''Wlan:''' This pad can power down Wlan peripheral using Omap GPIO low level (GND), power Pull-up removing GND. Also you can power down Wlan from J990 low level.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad selected and activated if you don't use it.'''(1)'''</div>pin is NOT configured as OUTPUT|-| 7 | MMC2_DAT5 | MMC2_DAT5 | Reset Bluethoot | MMC2_DIR_DAT1(mode=1) }
*Mux can connect multiple connectors at the same peripheral, this improper use can damage the processor. Before configure mux, revise that this peripheral is not used in other pads. See schematics or [[Connectors Summary| connectors summary]] for more information. *Some peripherals are only available if you place or replace some resistances. See schematics for more information.<div align="JUSTIFY"br>'''TPS65950*Some connectors share multiples peripherals like OMAP, WIFI/BT combo, etc. You should disable unused peripherals to avoid interferences. For example:''' if you want to control WIFI module via J990 disable it via kernel '''(2) '''If OMAP or if you don't want use it[[How to set up UART2 in J990|UART2 at j990]] disable Bluetooth.</div>See schematics of board or [[Connectors Summary|connectors summary]] or [[Mux_instructions#Disable_Peripherals|how-to disable peripherals]] or [[How_to_use_GPIOs| 6 | MCBSP3_CLKX | MCBSP3_CLKX | Transmitted serial Clock (Bluethoot audio) | UART2_TX(mode=1) how-to use gpios]] for more information.
{| <div aligncellspacing="JUSTIFY1">'''Bluethoot: '''Protect Bluethoot if you don' use it. See MMC2_DAT5 pad.</div> <div aligncellpadding="JUSTIFY1"><br> </div> <div alignborder="JUSTIFY1">'''TPS65950style="width:''' disable it via kernel '''(2) '''If you don't use it.</div>933px; height: 409px;"
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| 10 <br> | MCBSP3_DR [[Connectors Summary#J990_connector|J990]] | MCBSP3_DR [[Connectors Summary#J960_connector|J960]] | Received Serial Data (Bluethoot audio) [[Connectors Summary#J970_connector|J970]] | [[Connectors Summary#J400_connector|J400]] UART2_RTS(mode=1) GPIO_141(mode=4) | [[Connectors Summary#JC30_connector|JC30]] | [[Connectors Summary#JA42_connector|JA42]] | <div align="JUSTIFY">'''TPS65950:''' disable it via kernel '''(2) '''If you don't use it.</div>[[Connectors Summary#JA41_connector|JA41]]
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| 12 [[Peripherals Summary#UART| MCBSP1_DX UART1]] | MCBSP1_DX No | Transmited serial Data Yes, not default configuration (not used[[Mux instructions#UART1_in_J960|disable RS485]]) | No McSPI4_SIMO(mode=1) | No | No McBSP3_DX(mode=2) | No GPIO_158| Yes, not default configuration (mode=4[[Mux_instructions#TFP410|disable DVI]]) | -<br>
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| 14 [[Peripherals Summary#UART| MCBSP1_CLKX UART2]] | MCBSP1_CLKX Yes, not default configuration ([[How to set up UART2 in J990| Transmited serial clock (not useddisable Bluetooth]])
|
| -<br>No | No | No | No | No
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| 16 [[Peripherals Summary#UART| MCBSP1_FSX UART3]] | MCBSP1_FSX No | Transmited Frame Syncronization Yes, default configuration (not used[[Mux instructions#UART3_in_J960|Serial debug]]) | No McSPI4_CS0(mode=1) | No | No McBSP3_FSX(mode=2) | No GPIO_161| Yes, not default configuration (mode=4[[Mux_instructions#TFP410|disable DVI]]) | -<br>
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| 18 [[Peripherals Summary#UART|UART4]] | MCBSP1_DR No | MCBSP1_DR No | Received Serial Data (not used) No | No McSPI4_SOMI(mode=1) McBSP3_DR(mode=2) GPIO_159(mode=4) | No | No | -<br>No
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| 20 [[Peripherals Summary#GPIO| MCBSP1_CLKR | MCBSP1_CLKR | Received Clock (not used) GPIO]]
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| -<br>No | No | Yes, not default configuration ([[Mux instructions#GPIO_in_J990|disable JTAG]]) | Yes, default configuration | Yes, default configuration | Yes, not default configuration ([[Mux_instructions#TFP410|disable DVI]])
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| 22 [[Peripherals Summary#SPI|McSPI1]] | MCBSP1_FSR No | MCBSP1_FSR No | Received frame syncronization (not used) No | No GPIO_157(mode=4)<br> | No | Yes, default configuration | -<br>No
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| 23 [[Peripherals Summary#SPI|McSPI2]] | I2C2_SDA No | I2C2_SDA No | I2C Data No | No GPIO_183(mode=4)<br> | No | No | <div align="JUSTIFY">'''Cam connector:''' Check and RC14 is not welded or don't use it.<br></div>No
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| 24 [[Peripherals Summary#SPI| I2C2_SCL | I2C2_SCL | I2C Clock McSPI3]]
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| '''Cam connector:''' Check and RC13 is not welded or don't use it.No |-No | 25 No | REGEN No | - No | Master/Slave control power TPS65950<br> | - | -<br>|-| 26 | nRESET | - | Read Reset Omap | - Yes, not default configuration ([[Mux_instructions#TFP410| -disable DVI]])<br>
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| 27 [[Peripherals Summary#SPI|McSPI4]] | Yes, not default configuration ([[Mux instructions#GPIO_in_J990|disable GPIOs]]) | No | GND No | - No | GND No | - No | -<br>No
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| 28 [[Peripherals Summary#BSP|McBSP1]] | GND Yes, not default configuration ([[Mux instructions#GPIO_in_J990|disable GPIOs]]) | - No | GND No | - No | -<br>No |} '''(1):''' To protect Omap pads from external signals, configure Mux in mode=7 (safe_mode). With this mode, buffer is configured in high impedance '''(2):''' Disable TPS65950 go to file sound/soc/codecs/twl4030.c change line 54 Code: <pre>0x00, /* REG_VOICE_IF (0xF) */</pre> to Code: <pre>0x04, /* REG_VOICE_IF (0xF) */</pre> === J960 connector === J960 connector can not use mux capabilities, because this connector is dedicated to use RS232 comunication. Default hardware/software configuration is:<span lang="en" id="result_box"><span class="hps"></span></span><br> No {| cellspacing="1" cellpadding="1" border="1" style="width: 498px; height: 381px;"No
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| Pad [[Peripherals Summary#BSP|McBSP2]] | No | No | Connect to: No | Default periphera: No | Other peripheral: No | Share with:<br> No | Default function:<br>No
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| 1 [[Peripherals Summary#BSP|McBSP3]] | Yes, default configuration ([[Mux instructions#TP65950_PCM_VSP|Bluetooth audio]]) | No | - No | - No | - No | -<br> No | <br>No
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| 2 [[Peripherals Summary#BSP|McBSP4]] | No | RS232_RX2 No | UART3_RX No | UART2_RX No | -<br> No | Kernel console params'''Yes, not default configuration (4[[Mux instructions#GPIO_in_J990|disable GPIOs]])'''<br>| No
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| 3 [[Peripherals Summary#BSP|McBSP5]] | No | No | RS232_TX2 No | UART3_TX No | UART2_TX No | -<br> No | Kernel console params'''(4)'''<br>No
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| 4 [[Peripherals Summary#MMC|MMC1]] | No | No | - No | - No | - No | -<br> No | -<br>No
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| 5 [[Peripherals Summary#MMC|MMC2]] | Yes, default configuration ([[Mux instructions#WIFI|WIFI]]) | No | GND No | - No | - No | -<br> No | -<br>No
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| 6 [[Peripherals Summary#MMC|MMC3]] | No | No | GND No | - No | - No | -<br> No | -<br>No
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| 7 [[Peripherals Summary#I2C|I2C1]] | No | No | - No | - No | - No | -<br> No | -<br>No
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| 8 [[Peripherals Summary#I2C|I2C2]] | Yes, default configuration | No | RS232_TX1 No | UART1_TX No | UART3_TX No, [[Connectors Summary#JC30_connector|via hardware]] | RS485 interface'''(5)'''<br> No | -<br>No
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| 9 [[Peripherals Summary#I2C|I2C3]] | RS232_RX1 No | UART1_RX No | UART3_RX No | RS485 interface'''No | No | No | Yes, default configuration (5DVI)'''<br> | -<br>
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| 10 [[Peripherals Summary#I2C|I2C4]] | No | No | - No | - No | - No | -<br> No | -<br>No
|}
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| Pad: <br>| Connect to: [[Connectors Summary#J1_connector| Default peripheral (mode=0) J1]] | Default function: [[Connectors Summary#J4_connector| Other available peripherals: J4]] | style="text-align: left;" [[Connectors Summary#J5_connector| Share with:J5]]
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| 1 | VIO 1V8 [[Peripherals Summary#UART| - UART1]] | Power 1v8 Yes, not default configuration (disable DSS) | - Yes, default configuration | -<br>No
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| 2 [[Peripherals Summary#UART| SYS_BOOT5 UART2]] | SYS_BOOT5<br> | Omap boot config | MMC2_DIR_DATYes, not default configuration(mode=1) GPIO_7 (mode=4enable: TX and RX) | No | -<br>No
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| 3 | DC_5V [[Peripherals Summary#UART| - UART3]] | Power 5v Yes, default configuration | - No | <div align="JUSTIFY">-<br></div>No
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| 4 | GND [[Peripherals Summary#UART| - UART4]] | GND No | - Yes, not default configuration(disable: GPIO_64 and GPMC_WAIT3) | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">-<br></div>No
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| 5 [[Peripherals Summary#GPIO| SYS_BOOT0 GPIO]] | SYS_BOOT0<br> Yes, default configuration | Omap boot config Yes, default configuration | GPIO_2 (mode=4) | <div align="JUSTIFY"><br> -<br> </div>Yes, default configuration
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| 6 [[Peripherals Summary#SPI| SYS_BOOT1 McSPI1]] | SYS_BOOT1<br> No | Omap boot config<br> | GPIO_3 (mode=4) Yes, default configuration | <div align="JUSTIFY">-<br></div> <div align="JUSTIFY"><br></div>No
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| 7 [[Peripherals Summary#SPI| DVI_VSYNC McSPI2]] | DSS_VSYNC No | LCD vertical sync (Expansion)<br> | GPIO_68(mode=4) No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''<br></div>No
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| 8 [[Peripherals Summary#SPI| DVI_HSYNC McSPI3]] | DSS_HSYNC | LCD Horitzontal sync Yes, not default configuration (Expansiondisable DSS) | GPIO_67 (mode=4)<br> No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY"><div align="JUSTIFY">TFP410 '''(6)'''<br></div></div>No
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| 9 | DVI_ACBIAS [[Peripherals Summary#SPI| DSS_ACBIAS McSPI4]] | LCD Control (Expansion) No | GPIO_133(mode=4) No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY"><div align="JUSTIFY">TFP410 '''(6)'''<br></div></div>No
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| 10 | DVI_PUP [[Peripherals Summary#BSP| - McBSP1]] | Control signal for DVI controler (Expansion) No | - No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 11 [[Peripherals Summary#BSP| DVI_PCLK McBSP2]] | DSS_PCLK No | LCD clock (Expansion) | GPIO_66 (mode=4)<br> No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 12 | TS_nPEN_IRQ [[Peripherals Summary#BSP| McSPI1_CS1 McBSP3]] | Touchscreen control Yes, not default configuration (Expansiondisable UART2) | MMC3_CMD(mode=3) GPIO_175 (mode=4) No | <div align="JUSTIFY">-<br></div> <div align="JUSTIFY"><br></div>No
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| 13 | LCD_QVGA/nVGA | McBSP4_DX | Touchscreen control (Expansion) | GPIO_154 (mode=4)<br> | <div align="JUSTIFY">-<br></div>|-| 14 | LCD_ENVDD | McBSP4_DR | Touchscreen control (Expansion) | GPIO_153 (mode=4)<br> | -<br>|-| 15 | LCD_RESB [[Peripherals Summary#BSP| McBSP4_FSX McBSP4]] | Touchscreen control (Expansion) No | GPIO_155 (mode=4)<br> | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">-<br> </div> <div align="JUSTIFY"><br></div>|-| 16 | LCD_INI | McBSP4_CLKX | Touchscreen control (Expansion) | GPIO_152 (mode=4)<br> | <div align="JUSTIFY">-<br></div>|-| 17 | MCSPI1_CLK | McSPI1_CLK<br> | Touchscreen control (Expansion) | GPIO_171 (mode=4) | -<br>|-| 18 | MCSPI1_SIMO | McSPI1_SIMO | Touchscreen control (Expansion) | GPIO_172 (mode=4) | -<br>|-| 19 | MCSPI1_CS0 | McSPI1_CS0 | Touchscreen control (Expansion) | GPIO_174 (mode=4) | -<br>|-| 20 | MCSPI1_SOMI | McSPI1_SOMI | Touchscreen control (Expansion) | GPIO_173 (mode=4) | -<br>|} <br> '''(6):''' TFP410: Converts DVI signal to HDMI. They share the same video signal.<br> === JA41 connector === JA41 is used for DVI (Digital Video Interface) data part.<br> -There are some peripherals than can be connected to JA41 like DSSVENC, HW, DSS and SDIYes, but is not used in this how-to. Some pads have mux capabilities: {| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 669px; height: 1064px;"|-| Pad: | Connect to: | Default peripheral default configuration (mode=0disable GPMCs) | Default function: | Other available peripherals: | style="text-align: left;" | Share with:No
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| 1 | VIO 3V3 [[Peripherals Summary#BSP| - McBSP5]] | Power 3v3 No | - Yes, not default configuration (disable GPIOs) | -<br>No
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| 2 | GND | -<br> | GND | -<br> | -<br>[[Peripherals Summary#MMC|-MMC1]] | 3 No | DVI_DATA0 | DSS_D0 | LCD pixel data bit<br> | UART1_CTS(mode=2) GPIO_70(mode=4) | TFP410 '''(6)'''|-| 4 | DVI_DATA1 | DSS_D1 | LCD pixel data bit | UART1_RTS(mode=2) GPIO_71(mode=4) | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>|-| 5 | DVI_DATA2 | DSS_D2 | LCD pixel data bit | GPIO_72(mode=4) No | TFP410 '''(6)'''No
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| 6 [[Peripherals Summary#MMC| DVI_DATA3 MMC2]] | DSS_D3 No | LCD pixel data bit | GPIO_73(mode=4) No | TFP410 '''(6)'''<div align="JUSTIFY"><br></div>No
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| 7 | DVI_DATA4 [[Peripherals Summary#MMC| DSS_D4 MMC3]] | LCD pixel data bit No | UART3_RX(mode=2) GPIO_74(mode=4) No | <div align="JUSTIFY">TFP410 '''Yes, not default configuration (6disable GPIOs)'''</div> <div align="JUSTIFY"><br></div>
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| 8 | DVI_DATA5 [[Peripherals Summary#I2C| DSS_D5 I2C1]] | LCD pixel data bit No | UART3_TX(mode=2) GPIO_75(mode=4)<br> No | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><br></div>No
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| 9 | DVI_DATA6 [[Peripherals Summary#I2C| DSS_D6 I2C2]] | LCD pixel data bit No | UART1_TX(mode=2) GPIO_76(mode=4) No | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><div align="JUSTIFY"><br></div></div>No
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| 10 | DVI_DATA7 | DSS_D7 [[Peripherals Summary#I2C| LCD pixel data bit I2C3]] | UART1_RXYes, default configuration (mode=2) GPIO_77(mode=4J5) | No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''Yes, default configuration (6J1)'''</div>
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| 11 | DVI_DATA8 | DSS_D8 | LCD pixel data bit | GPIO_78(mode=4)<br> | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>|-| 12 | DVI_DATA9 | DSS_D9 | LCD pixel data bit | GPIO_79(mode=4) | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><br></div>|-| 13 | DVI_DATA10 | DSS_D10 | LCD pixel data bit | GPIO_80(mode=4)<br> | <div align="JUSTIFY">TFP410 '''(6)'''</div>|-| 14 | DVI_DATA11 | DSS_D11 | LCD pixel data bit | GPIO_81(mode=4)<br> | TFP410 '''(6)'''|-[[Peripherals Summary#I2C| 15 I2C4]] | DVI_DATA12 No | DSS_D12 | LCD pixel data bit | GPIO_82(mode=4)<br> | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)''' </div> <div align="JUSTIFY"><br></div>|-| 16 | DVI_DATA13 | DSS_D13 | LCD pixel data bit | GPIO_83(mode=4)<br> | <div align="JUSTIFY">TFP410 '''(6)'''</div>|-| 17 | DVI_DATA14 | DSS_D14 | LCD pixel data bit | GPIO_84(mode=4) | TFP410 '''(6)'''|-| 18 | DVI_DATA15 | DSS_D15 | LCD pixel data bit | GPIO_85(mode=4) | TFP410 '''(6)'''|-| 19 | DVI_DATA16 | DSS_D16 | LCD pixel data bit | GPIO_86(mode=4) | TFP410 '''(6)'''|-| 20 | DVI_DATA17 | DSS_D17 | LCD pixel data bit | GPIO_87(mode=4) | TFP410 '''(6)'''|-| 21<br> | DVI_DATA18 | DSS_D18 | LCD pixel data bit | DSS_D0 (mode=3) MCSPI3_CLK(mode=2) GPIO_88(mode=4) | TFP410 '''(6)'''|-| 22<br> | DVI_DATA19 | DSS_D19 | LCD pixel data bit | DSS_1 (mode=3) MCSPI3_SIMO(mode=2) GPIO_89(mode=4) | TFP410 '''(6)'''|-| 23<br> | DVI_DATA20 | DSS_D20 | LCD pixel data bit | DSS_D2 (mode=3) MCSPI3_SOMI(mode=2) GPIO_90(mode=4) | TFP410 '''(6)'''|-| 24<br> | DVI_DATA21 | DSS_D21 | LCD pixel data bit | DSS_3 (mode=3) MCSPI3_CSO(mode=2) GPIO_91(mode=4) | TFP410 '''(6)'''|-| 25<br> | DVI_DATA22<br> | DSS_D22<br> | LCD pixel data bit | DSS_D4 (mode=3) MCSPI3_CS1(mode=2) GPIO_92(mode=4) | TFP410 '''(6)'''|-| 26<br> | DVI_DATA23<br> | DSS_D23<br> | LCD pixel data bit | DSS_D5(mode=3) GPIO_93(mode=4) | TFP410 '''(6)'''|-| 27<br> | I2C3_SCL<br> | I2C3_SCL | I2C3 interface | GPIO_184(mode=4) | TXS0102DCUR<br>|-| 28<br> | I2C3_SDA<br> | I2C3_SDA | I2C3 interface | GPIO_185(mode=4) No | TXS0102DCUR<br>No
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