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Mux configuration

6,525 bytes removed, 10:55, 17 February 2014
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= Overview =
Mux (or multiplexer) This wiki is meant to be a Omap peripheral that can be controlled via software. Its function is connect other peripherals starting point for people to some available Omap pinslearn configure mux for IGEP devices as quickly and easily as possible. This wiki contains:<br>
Each pin is configurable by software using its associated pad configuration register field, which is 16 bits wide: *Mux characteristics summary*Tips to avoid problems*Ways to configure mux*Tables that links peripherals and connectors for IGEPv2 and IGEP MODULE
{| cellspacing="1" cellpadding="1" border="1" align="center"
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| [[Image:Mux register.png]]
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<br> One pad configuration register field is available for each pin. Each 32-bit pad configuration register is grouped into two 16-bit pad configuration register fields. One pad configuration register provides control for two different pins. These registers can be accessed using 8, 16 There are three ways to configure mux in IGEP Boards based in OMAP35xx and 32 bits operations.DM37xx:<br>
*[[Mux_instructions|Configuring MUX from OS User Space]]. This mode has a issue, when your system reboot or shutdown you will need to configure again. [[How to set up UART2 in J990#First_way|Example]]. *Configuring MUX by using kernel commandline buddies. This way is not avaliable in some cases. [[How to set up UART2 in J990#Second_way|Example]] and [[Linux Kernel 2.6.37.y#Kernel_Parameters|buddies parametres]].<br> *Editing and compile kernel sources. [[How to set up UART2 in J990#Third_way|Example]].<br> '''(more information)'''
<br>
IgepV2 Board have a default mux configuration, but some cases is necessary change it, for example your project need UART2 at j990 connector to transmit data, for this purpose you need change some mux configurations to enable it and be sure that this modification don't break or interferes in other IC or peripherals. The mux options are vast. = Introduction =
This How-To Mux (or multiplexer) is meant to a Omap peripheral that can be a starting point for people to learn configure mux for IGEP v2 devices as quickly and easily as possiblecontrolled via software. For this how-Its function is connect other peripherals to i used [http://releases.linaro.org/platform/linaro-m/headless/final/linaro-m-headless-tar-20101108-2.tar.gz Linaro Headless] and Ubuntu 10.04 with Linaro Toolchainsome available Omap pins.<br>
= Feedback and Contributing =Each pin is configurable by software using its associated pad configuration register field, which is 16 bits wide:
At any point, if you see a mistake you can contribute to this How-To.  = Available peripherals on external connector = Before configure mux is necessary review some things:  - If connector is shared with other peripherals you should disable it via software or hardware.<br> - Don't use the same peripheral in more than one pad.<br> - Omap mux have 8 modes, somes modes are disable in some pads.  The next tables show you all the mux capabilities:  === J990 connector === -There are some peripherals than can be connected to J990 like mm3 and camera, but is not used in this how-to.  -High Speed USB 3 is only available on Omap 3530 in the next pads:  &nbsp;&nbsp;&nbsp;&nbsp; 3: HSUSB3_TLL_NXT<br> &nbsp;&nbsp;&nbsp;&nbsp; 4: HSUSB3_TLL_D4<br> &nbsp;&nbsp;&nbsp;&nbsp; 5: HSUSB3_TLL_DIR <br> &nbsp;&nbsp;&nbsp;&nbsp; 6: HSUSB3_TLL_D6<br> &nbsp;&nbsp;&nbsp;&nbsp; 7: HSUSB3_TLL_STP<br> &nbsp;&nbsp;&nbsp;&nbsp; 8: HSUSB3_TLL_D7 <br> &nbsp;&nbsp;&nbsp;&nbsp; 10: HSUSB3_TLL_D5  <br>  {| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 960px; height: 1463px;center"
|-
| Pad[[Image: Mux register.png]]| Connect to: | Default peripheral (mode=0)  | Default function: | Other available peripherals: | style="text-align: left;" | Share with:|-| 1 | VIO 1V8 | - | Power 1v8 | - | -<br>|-| 2 | DC 5V | - | Power 5v | - | -<br>|-| 3 | MMC2_DAT7 | MMC2_DAT7 | Reset Wlan | MMC2_CLKIN(mode=1)  MMC3_DAT3(mode=3)  GPIO_139(mode=4) }
| <div align="JUSTIFY"br>'''Wlan:''' This One pad can reset Wlan peripheral using Omap GPIO low level (GND)configuration register field is available for each pin. Each 32-bit pad configuration register is grouped into two 16-bit pad configuration register fields. If you reset continuously Wlan all their pads are in High ImpedanceOne pad configuration register provides control for two different pins. Also you These registers can disable Wlan from J990 low level.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use itbe accessed using 8, 16 and 32 bits operations.'''(1)'''</divbr>|-| 5 | MMC2_DAT6 | MMC2_DAT6 | Power down&nbsp; Wlan | MMC2_DIR_CMD(mode=1)
MMC3_DAT2(mode=3) The functional bits of a pad configuration register field are divided into the following five fields:
GPIO_138• '''MUXMODE''' (3 bits) defines the multiplexing mode=4applied to the pin. A mode corresponds to the selection of the functionality mapped on the pin with six (0 to 5) possible functional modes for each pin.
| <div align="JUSTIFY">'''Wlan:PULL''' This pad can power down Wlan peripheral using Omap GPIO low level (GND2 bits), power up removing GND. Also you can power down Wlan from J990 low level.<for combinational pullup/div> <div align="JUSTIFY">'''Omappulldown configuration: '''protect Omap pad if you don't use it.'''(1)'''</div>|-| 7 | MMC2_DAT5 | MMC2_DAT5 | Reset Bluethoot | MMC2_DIR_DAT1(mode=1)
MMC3_DAT1(mode=3) -&gt; PULLTYPESELECT: Pullup/pulldown selection for the pin.
GPIO_137(mode=4) -&gt; PULLUDENABLE: Pullup/pulldown enable for the pin.
| <div align="JUSTIFY">'''Bluethoot: '''This pad can reset Bluethoot peripheral using Omap GPIO low level (GND). If you reset continuously Bluethoot all their pads are in High Impedance. Also you can disable Bluethoot from J990 low level.'''Omap: '''protect Omap pad if you don't use it.INPUTENABLE'''(1bit)'''<br> <drives an input enable signal to the I/div>|-| 9 | MMC2_DAT4 | MMC2_DAT4 | - | MMC_DIR_DAT0(mode=1) O CTRL.
MMC3_DAT0• '''Off mode values''' (5 bits) override the pin state when the OFFENABLE bit CONTROL. This feature is used for power saving management. Pins in off mode=3) can be configured like output with HIGH or LOW value or input with wake-up detection feature. For input pins, OFFOUTENABLE and OFFOUTVALUE bits can not be configured:
GPIO136(-&gt;OFFENABLE: Off mode=4) pin state override control. Set to 1 to enable the feature and to 0 to disable it.
| <div align="JUSTIFY">'''Wlan-&gt;OFFOUTENABLE: '''Protect Wlan if you don' use itOff mode output enable value. See MMC2_DAT7 pad.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use Set to 0 to enable the feature and to 1 to disable it.'''(1)'''</div>|-| 11 | MMC2_DAT3 | MMC2_DAT3 | Transfer data between Omap and Wlan | McSPI3_CS0(mode=1)
GPIO_135(-&gt;OFFOUTVALUE: Off mode=4) output value.
| <div align="JUSTIFY">'''Wlan-&gt;OFFPULLUDENABLE: '''Protect Wlan if you don' use it. See MMC2_DAT7 pad.<Off mode pullup/div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use itpulldown enable.'''(1)'''</div>|-| 13 | MMC2_DAT2 | MMC2_DAT2 | Transfer data between Omap and Wlan | McSPI3_CS1(mode=1)<br>
GPIO_134(-&gt;OFFPULLTYPESELECT: Off mode=4) pullup/pulldown selection.
| <div align="JUSTIFY">'''Wlan: '''Protect Wlan if you don' use it. See MMC2_DAT7 pad.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use it.Wake-up'''bits (12 bits)'''</div>|-| 15 | MMC2_DAT1 | MMC2_DAT1 | Transfer data between Omap and Wlan | &nbsp;GPIO_133(mode=4) | <div align="JUSTIFY">'''Wlan: '''Protect Wlan if you don' use it. See MMC2_DAT7 pad.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use it.'''(1)'''</div>|-| 17 | MMC2_DAT0 | MMC2_DAT0 | Transfer data between Omap and Wlan | McSPI3_SOMI(mode=1)
GPIO_132(-&gt;WAKEUPENABLE: Enable wake-up detection on input. It is also the off mode=4) input enable value.
| <div align="JUSTIFY">'''Wlan-&gt;WAKEUPEVENT: Wake-up event status for the pin.'''Protect Wlan if you don' use it. See MMC2_DAT7 pad.</divbr> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use it.'''(1)'''</div>|-| 19 | MMC2_CMD | MMC2_CMD | Control Wire for bus MMC2 (Wlan) | McSPI3_SIMO(mode=1)
GPIO_131(mode{| cellspacing="1" cellpadding=4)  | <div "1" border="1" align="JUSTIFYcenter">'''Wlan: '''Protect Wlan if you don' use it. See MMC2_DAT7 pad.</div> <div alignwidth="JUSTIFY200">'''Omap: '''protect Omap pad if you don't use it.'''(1)'''</div>
|-
| 21
| MMC2_CLK0
| MMC2_CLK
| Clock for MMC2 (Wlan)
|
McSPI3_CLK(mode=1) [[Image:Mux pad configuration diagram.png]]
GPIO_130(mode=4) |}
| <div align="JUSTIFY">'''Wlan: '''Protect Wlan if you don' use it. See MMC2_DAT7 pad.</div> <div align="JUSTIFY">'''Omap: '''protect Omap pad if you don't use it.'''(1)'''</div>|-| 4 | MCBSP3_DX | MCBSP3_DX | Transmitted serial Data (Bluethoot audio) | UART2_CTS(mode=1)  GPIO_140(modeMode selection =4)  | <div align="JUSTIFY">'''TPS65950:''' disable it via kernel '''(2) '''If you don't use it.</div>|-| 6 | MCBSP3_CLKX | MCBSP3_CLKX | Transmitted serial Clock (Bluethoot audio) | UART2_TX(mode=1)
GPIO_142(mode=4) The next table shows all capabilities.<br>
{| <div aligncellspacing="JUSTIFY1">'''Bluethoot: '''Protect Bluethoot if you don' use it. See MMC2_DAT5 pad.</div> <div aligncellpadding="JUSTIFY1"><br> </div> <div alignborder="JUSTIFY1">'''TPS65950style="width:''' disable it via kernel '''(2) '''If you don't use it.</div>287px; height: 235px;"
|-
| 8 MUXMODE | MCBSP3_FSX | MCBSP3_FSX | Transmited Frame Syncronisation (Bluethoot audio) | UART2_RX(mode=1)  GPIO_143(mode=4)  | <div align="JUSTIFY">'''Bluethoot: '''Protect Bluethoot if you don' use it. See MMC2_DAT5 pad.</div> <div align="JUSTIFY"><br> </div> <div align="JUSTIFY">'''TPS65950:''' disable it via kernel '''(2) '''If you don't use it.</div>Select Mode
|-
| 10 | MCBSP3_DR | MCBSP3_DR | Received Serial Data (Bluethoot audio) 0b000=0 | UART2_RTSMode 0 (Primary mode=1)  GPIO_141(mode=4)  | <div align="JUSTIFY">'''TPS65950:''' disable it via kernel '''(2) '''If you don't use it.</div>
|-
| 12 | MCBSP1_DX | MCBSP1_DX | Transmited serial Data (not used) 0b001=1 | McSPI4_SIMO(mode=Mode 1)  McBSP3_DX(Possible mode=2)  GPIO_158(mode=4)  | -<br>
|-
| 14 | MCBSP1_CLKX 0b010=2 | MCBSP1_CLKX | Transmited serial clock (not used) | McBSP3_CLKX(mode=Mode 2)<br>  GPIO_162(Possible mode=4)  | -<br>
|-
| 16 | MCBSP1_FSX 0b011=3 | MCBSP1_FSX | Transmited Frame Syncronization (not used) | McSPI4_CS0(mode=1)  McBSP3_FSXMode 3 (Possible mode=2)  GPIO_161(mode=4)  | -<br>
|-
| 18 0b100=4 | MCBSP1_DR | MCBSP1_DR | Received Serial Data (not used) | McSPI4_SOMIMode 4 (Possible mode=1)  McBSP3_DR(mode=2)  GPIO_159(mode=4)  | -<br>
|-
| 20 | MCBSP1_CLKR | MCBSP1_CLKR | Received Clock (not used) 0b101=5 | GPIO_156Mode 5 (Possible mode=4)<br>  | -<br>
|-
| 22 | MCBSP1_FSR | MCBSP1_FSR | Received frame syncronization (not used) 0b110=6 | GPIO_157Mode 6 (Possible mode=4)<br>  | -<br>
|-
| 23 | I2C2_SDA | I2C2_SDA 0b111=7 | I2C Data | GPIO_183Mode 7 (mode=4Safe Mode)<br> |}
| <div align="JUSTIFY">'''Cam connectorDefinitions:''' Check and RC14 is not welded or don't use it.<br></div>|-| 24 | I2C2_SCL | I2C2_SCL | I2C Clock | GPIO_168(mode=4)<br>
| '''Cam connector:Mode 0''' Check and RC13 is not welded or the primary mode. When mode 0 is set, the function mapped to the pin corresponds to the name of the pin. In IGEP some pads don't use itprimary mode by default.|-| 25 | REGEN | - | Master/Slave control power TPS65950<br> | - | -<br>|-| 26 | nRESET | - | Read Reset Omap | - | -<br>|-| 27 | GND | - | GND | - | -<br>|-| 28 | GND | - | GND | - | -<br>|}
'''(Mode 1):to mode 6''' To protect Omap pads from external signalsare possible modes for alternate functions. On each pin, some modes are used effectively for alternate functions, configure Mux in mode=7 (safe_mode)while other modes are unused and correspond to no functional configuration. With this mode, buffer is configured in high impedance
'''The safe mode (2default mode 7):''' Disable TPS65950 go avoids any risk of electrical contention by configuring the pin as an input with no functional interface mapped to file sound/soc/codecs/twl4030it. The safe mode is used mainly as the default mode for all pins containing no mandatory interface at the release of power-on reset.c change line 54 Code: <pre>0x00, /* REG_VOICE_IF (0xF) */</pre> to Code: <pre>0x04, /* REG_VOICE_IF (0xF) */</prebr>
=== J960 connector Pull Selection ===
J960 connector can not use mux The next table shows all capabilities, because this connector is dedicated to use RS232 comunication. Default hardware/software configuration is:<span lang="en" id="result_box"><span class="hps"></span></span><br>
{| cellspacing="1" cellpadding="1" border="1" style="width: 498px696px; height: 381px1px;"|-| Pad | Connect to: | Default periphera: | Other peripheral: | Share with:<br> | Default function:<br>|-| 1 | - | - | - | -<br> | <br>|-| 2 | RS232_RX2 | UART3_RX | UART2_RX | -<br> | Kernel console params'''(4)'''<br>|-| 3 | RS232_TX2 | UART3_TX | UART2_TX | -<br> | Kernel console params'''(4)'''<br>|-| 4 | - | - | - | -<br> | -<br>|-| 5 | GND | - | - | -<br> | -<br>
|-
| 6 PULLTYPESELECT | GND PULLUDENABLE | - | - | -<br> | -<br>Pin Behavior
|-
| 7 0b0 | - | - | - | -<br> 0b0 | Pull-<br>down selected but not activated
|-
| 8 0b0 | RS232_TX1 | UART1_TX | UART3_TX | RS485 interface'''(5)'''<br> 0b1 | Pull-<br>down selected and activated if pin is NOT configured as OUTPUT
|-
| 9 0b1 | RS232_RX1 | UART1_RX | UART3_RX | RS485 interface'''(5)'''<br> 0b0 | Pull-<br>up selected but not activated
|-
| 10 0b1 | - | - | - | -<br> 0b1 | Pull-<br>up selected and activated if pin is NOT configured as OUTPUT
|}
<br>  - Other peripherals can be configured via hardwareWhen a pin is in output mode, placing/replacing some resistances. See IGEPv2 Schematic for more informationpulls are automatically disable.
'''(4):''' To set other functionalities to UART3 (/dev/ttyS2) edit igep.ini file: === Input Enable ===
Search line: <pre>consoleINPUTENABLE =ttyS2,115200n8</pre> Replace by0: <pre>; console=ttyS2,115200n8</pre> '''(5): '''Allows to use UART1 as RS232 instead of EI485, edit igepInput Disable. Pin is configured in output only mode.ini:<br>
Search lineINPUTENABLE = 1: <pre>boardInput Enable.ei485=yes</pre> Replace by: <pre>boardPin is configured in bidirectional mode.ei485=no</prebr>
=== J400 connector '''Off mode values''' and '''Wake-up''' ===
J400 This mode is used to JTAG (Joint Test Action Group)disable some pins and reduce power consumption. JTAG is a standardized serial protocol widely used in printed circuit boards. Its main functions are:<br>
-Debug the software of an embedded system directly <br>-Storing firmware<br> -Boundary scan testing Please contribute.
More information: [http://eswww.wikipediati.orgcom/wikilit/JTAG http:ug/spruf98x/esspruf98x.wikipedia.org/wiki/JTAGpdf More information]about mux.
Only Pad 13 and 14 have mux capabilities, for example you can use them like GPIO(mode=4). More information in IGEPv2 Schematic.<br>Configure Mux =
=== J970 connector ===Mux options are vast, at the beginning can be difficult and tedious change some configurations. Before configure mux, use the following tips to avoid problems:
This connector don't have *Mux can connect multiple connectors at the same peripheral, this improper use can damage the processor. Before configure mux capabilities, revise that this peripheral is not used in other pads. See schematics or [[Connectors Summary|connectors summary]] for more information. *Some peripherals are only available if you place or replace some resistances. See schematics for more information.<br> *Some connectors share multiples peripherals like OMAP, WIFI/BT combo, etc. You should disable unused peripherals to avoid interferences.&nbsp; For example: if you want to control WIFI module via J990 disable OMAP or if you want use [[How to set up UART2 in J990|UART2 at j990]] disable Bluetooth. See schematics of board or [[Connectors Summary|connectors summary]] or [[Mux_instructions#Disable_Peripherals|how-to disable peripherals]] or [[How_to_use_GPIOs|how-to use gpios]] for more information.
J970 is used to implement a keypad. It is controlled by TPS65950, this method avoid reduce Omap proces capabilities. TPS65950 send via I2C1 all the interrupt request. Their characteristics are:<br> === IGEPv2 ===
- Can handle up Next table pretends help you to 8 x 8 keypads, configure IGEPv2. First column shows some OMAP35xx/DM37xx peripherals and first row shows all IGEPv2 connectors. Read articles about connector and peripheral before use them. Each configuration can handle up to 4 x 4 keypadstake different solutions.<br>- OptionallyThere are some connectors than have more peripherals available, you can decode via Omap software.<br>- Event detection on key press and key releasebut they don't have all signals to use it.<br>- Multikey press detection, can detect up 2Table shows four answers:&nbsp; keys at the same time.<br>- Long-key detection on prolonged key press.<br>- Programmable time-out on permanent key press or after keypad release.
More *"'''Yes, default configuration(utility)'''": Peripheral enabled by default. "utility" shows if this peripheral is used.<br> *"'''Yes, not default configuration(information in TPS65950 datasheets)'''": Peripheral don't enabled by default. Maybe you need to disable other one<br> *"'''No, via hardware'''": Not available, but via hardware (placing or replacing some resistances) can be enabled.<br> *"'''No'''"
=== JC30 connector === JC30 is used to connect a camera for capture video or image. Omap have the processing capability to connect RAW image-sensor modules via this connector.  There are some peripherals than can be connected to JC30 like like CAM, SSI and CSI, but is not used in this how-to. GPIO are the default peripheral.<br>  Before use this connector be careful at these points:  - Pad 1 can be used to power down wifi module if RD41 is short circuit, replace RD42 for this porpouse.<br>- Pad 2 can be used to reset wifi module if RD43 is short circuit, replace RD44 for this porpouse.<br>- Pad 21 can be connected to I2C2_SCL, that wire is shared with J990 connector and I2C2_SCL peripheral. Placing/replacing RC13 for tis porpouse.<br>- Pad 22 can be connected to I2C2_SDA, that wire is shared with J990 connector and I2C2_SDA peripheral. Placing/replacing RC14 for tis porpouse.  === JA42 connector === JA42 is used for DVI (Digital Video Interface) control part, TouchScreen control and SPI1.<br>  -There are some peripherals than can be connected to JA42 like MM3, MM2, SSI, USB and HW_DBG, but is not used in this how-to.  Some pads have mux capabilities:  {| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 804px933px; height: 343px409px;"
|-
| Pad: <br> | Connect to: [[Connectors Summary#J990_connector|J990]] | [[Connectors Summary#J960_connector|J960]] Default peripheral (mode=0) | [[Connectors Summary#J970_connector|J970]] | [[Connectors Summary#J400_connector|J400]] | Default function: [[Connectors Summary#JC30_connector|JC30]] | Other available peripherals: [[Connectors Summary#JA42_connector|JA42]] | style="text-align: left;" [[Connectors Summary#JA41_connector| Share with:JA41]]
|-
| 1 [[Peripherals Summary#UART|UART1]] | No | VIO 1V8 Yes, not default configuration ([[Mux instructions#UART1_in_J960|disable RS485]]) | - No | Power 1v8 No | - No | -<br>No | Yes, not default configuration ([[Mux_instructions#TFP410|disable DVI]])
|-
| 2 [[Peripherals Summary#UART|UART2]] | SYS_BOOT5 Yes, not default configuration ([[How to set up UART2 in J990|disable Bluetooth]])
|
SYS_BOOT5<br> No, [[How to use UARTs#RS232_Schematic_Igep_V2|via hardware]],
[[Mux instructions#Bluetooth| Omap boot config | MMC2_DIR_DAT(mode=1) disable Bluetooth]]
GPIO_7 (mode=4) | No | No | No | No | -<br>No
|-
| 3 [[Peripherals Summary#UART|UART3]] | No | DC_5V Yes, default configuration ([[Mux instructions#UART3_in_J960|Serial debug]]) | - No | Power 5v No | - No | <div align="JUSTIFY">-<br></div>No | Yes, not default configuration ([[Mux_instructions#TFP410|disable DVI]])
|-
| 4 [[Peripherals Summary#UART|UART4]] | No | No | GND No | - No | GND No | - No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">-<br></div>No
|-
| 5 [[Peripherals Summary#GPIO| SYS_BOOT0 GPIO]]
|
SYS_BOOT0<br> Yes, default configuration ([[Mux instructions#GPIO_in_J990|info]])
| Omap boot config No | No GPIO_2 | Yes, not default configuration (mode=4[[Mux instructions#GPIO_in_J990|disable JTAG]]) | Yes, default configuration | <div align="JUSTIFY"><br> Yes, default configuration | Yes, not default configuration ([[Mux_instructions#TFP410|disable DVI]])|-<br> </div>| [[Peripherals Summary#SPI|McSPI1]] | No | No | No | No | No | Yes, default configuration | No
|-
| 6 [[Peripherals Summary#SPI|McSPI2]] | SYS_BOOT1 No | No SYS_BOOT1<br> | No | No | Omap boot config<br> No | GPIO_3 (mode=4) No | <div align="JUSTIFY">-<br></div> <div align="JUSTIFY"><br></div>No
|-
| 7 [[Peripherals Summary#SPI| DVI_VSYNC | DSS_VSYNC | LCD&nbsp;vertical sync (Expansion)<br> McSPI3]]
|
GPIO_68Yes, not default configuration (mode=4[[Mux instructions#WIFI|disable WIFI]])
| <div align="JUSTIFY"><br></div> <div align="JUSTIFY">No | No | No | No | No | Yes, not default configuration ([[Mux_instructions#TFP410 '''(6|disable DVI]])'''<br></div>
|-
| 8 [[Peripherals Summary#SPI|McSPI4]] | DVI_HSYNC Yes, not default configuration ([[Mux instructions#GPIO_in_J990|disable GPIOs]]) | DSS_HSYNC No | LCD Horitzontal sync (Expansion) No | No GPIO_67 (mode=4)<br> | No | No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY"><div align="JUSTIFY">TFP410 '''(6)'''<br></div></div>No
|-
| 9 [[Peripherals Summary#BSP|McBSP1]] | Yes, not default configuration ([[Mux instructions#GPIO_in_J990|disable GPIOs]]) | No | DVI_ACBIAS No | DSS_ACBIAS No | LCD Control (Expansion) No | &nbsp; GPIO_133(mode=4) No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY"><div align="JUSTIFY">TFP410 '''(6)'''<br></div></div>No
|-
| 10 [[Peripherals Summary#BSP|McBSP2]] | No | No | DVI_PUP No | - No | Control signal for DVI controler (Expansion) No | - No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
|-
| 11 [[Peripherals Summary#BSP|McBSP3]] | DVI_PCLK Yes, default configuration ([[Mux instructions#TP65950_PCM_VSP|Bluetooth audio]]) | DSS_PCLK No | LCD clock (Expansion) No | No GPIO_66 (mode=4)<br> | No | No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
|-
| 12 [[Peripherals Summary#BSP|McBSP4]] | TS_nPEN_IRQ No | McSPI1_CS1 No | Touchscreen control (Expansion) No | No MMC3_CMD(mode=3) | No  GPIO_175 | Yes, not default configuration (mode=4[[Mux instructions#GPIO_in_J990|disable GPIOs]])  | <div align="JUSTIFY">-<br></div> <div align="JUSTIFY"><br></div>No
|-
| 13 [[Peripherals Summary#BSP|McBSP5]] | LCD_QVGA/nVGA No | McBSP4_DX No | Touchscreen control (Expansion) No | No GPIO_154 (mode=4)<br> | No | No | <div align="JUSTIFY">-<br></div>No
|-
| 14 [[Peripherals Summary#MMC|MMC1]] | LCD_ENVDD No | McBSP4_DR No | Touchscreen control (Expansion) No | No GPIO_153 (mode=4)<br> | No | No | -<br>No
|-
| 15 [[Peripherals Summary#MMC|MMC2]] | LCD_RESB Yes, default configuration ([[Mux instructions#WIFI|WIFI]]) | McBSP4_FSX No | Touchscreen control (Expansion) No | No GPIO_155 (mode=4)<br> | No | No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">-<br> </div> <div align="JUSTIFY"><br></div>No
|-
| 16 [[Peripherals Summary#MMC|MMC3]] | LCD_INI No | McBSP4_CLKX No | Touchscreen control (Expansion) No | No GPIO_152 (mode=4)<br> | No | No | <div align="JUSTIFY">-<br></div>No
|-
| 17 [[Peripherals Summary#I2C|I2C1]] | MCSPI1_CLK No | No McSPI1_CLK<br> | No | No | Touchscreen control (Expansion) No | GPIO_171 (mode=4) No | -<br>No
|-
| 18 [[Peripherals Summary#I2C|I2C2]] | MCSPI1_SIMO Yes, default configuration | McSPI1_SIMO No | Touchscreen control (Expansion) No | No GPIO_172 (mode=4) | No, [[Connectors Summary#JC30_connector|via hardware]] | No | -<br>No
|-
| 19 [[Peripherals Summary#I2C|I2C3]] | MCSPI1_CS0 No | McSPI1_CS0 No | Touchscreen control (Expansion) No | No GPIO_174 (mode=4) | No | No | -<br>Yes, default configuration (DVI)
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| 20 [[Peripherals Summary#I2C|I2C4]] | MCSPI1_SOMI No | McSPI1_SOMI No | Touchscreen control (Expansion) No | No GPIO_173 (mode=4) | No | No | -<br>No
|}
<br> '''(6):''' TFP410: Converts DVI&nbsp;signal to HDMI. They share the same video signal.<br>  === JA41 connector IGEP MODULE === JA41 is used for DVI (Digital Video Interface) data part.<br>
-Next table pretends help you to configure IGEP MODULE. First column shows some OMAP35xx/DM37xx peripherals and first row shows all IGEP MODULE connectors. Read articles about connector and peripheral before use them. Each configuration can take different solutions. <br> There are some connectors than have more peripherals than can be connected to JA41 like DSSVENC, HW, DSS and SDIavailable, but is not used in this how-they don't have all signals touse it. <br> Table shows four answers:&nbsp;
Some pads have mux capabilities*"'''Yes, default configuration(utility)'''": Peripheral enabled by default. "utility" shows if this peripheral is used.<br> *"'''Yes, not default configuration(information)'''": Peripheral don't enabled by default. Maybe you need to disable other one<br> *"'''No, via hardware'''": Not available, but via hardware (placing or replacing some resistances) can be enabled.<br> *"'''No'''"
{| cellspacing="1" cellpadding="1" border="1" align="JUSTIFY" style="width: 669px933px; height: 1064px190px;"
|-
| Pad: <br>| Connect to: [[Connectors Summary#J1_connector| Default peripheral (mode=0) J1]] | Default function: [[Connectors Summary#J4_connector| Other available peripherals: J4]] | style="text-align: left;" [[Connectors Summary#J5_connector| Share with:J5]]
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| 1 | VIO 3V3 [[Peripherals Summary#UART| - UART1]] | Power 3v3 Yes, not default configuration (disable DSS) | - Yes, default configuration | -<br>No
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| 2 [[Peripherals Summary#UART| GND UART2]] | -<br> Yes, not default configuration(enable: TX and RX) | GND | -<br> No | -<br>No
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| 3 | DVI_DATA0 [[Peripherals Summary#UART| &nbsp; DSS_D0 UART3]] | LCD&nbsp;pixel data bit<br> Yes, default configuration | UART1_CTS(mode=2)  GPIO_70(mode=4) No | TFP410 '''(6)'''No
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| 4 | DVI_DATA1 [[Peripherals Summary#UART| &nbsp; DSS_D1 UART4]] | LCD&nbsp;pixel data bit No | UART1_RTSYes, not default configuration(mode=2disable: GPIO_64 and GPMC_WAIT3)  GPIO_71(mode=4)  | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 5 [[Peripherals Summary#GPIO| DVI_DATA2 GPIO]] | &nbsp;DSS_D2 Yes, default configuration | LCD&nbsp;pixel data bit | GPIO_72(mode=4) Yes, default configuration | TFP410 '''(6)'''Yes, default configuration
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| 6 [[Peripherals Summary#SPI| DVI_DATA3 McSPI1]] | DSS_D3 No | LCD&nbsp;pixel data bit | GPIO_73(mode=4) Yes, default configuration | TFP410 '''(6)'''<div align="JUSTIFY"><br></div>No
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| 7 | DVI_DATA4 [[Peripherals Summary#SPI| &nbsp;DSS_D4 McSPI2]] | LCD&nbsp;pixel data bit No | UART3_RX(mode=2)  GPIO_74(mode=4) No | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><br></div>No
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| 8 | DVI_DATA5 [[Peripherals Summary#SPI| DSS_D5 McSPI3]] | LCD&nbsp;pixel data bit | UART3_TXYes, not default configuration (mode=2disable DSS)  GPIO_75(mode=4)<br> | No | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><br></div>No
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| 9 | DVI_DATA6 [[Peripherals Summary#SPI| DSS_D6 McSPI4]] | LCD&nbsp;pixel data bit No | &nbsp;UART1_TX(mode=2)  GPIO_76(mode=4) No | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><div align="JUSTIFY"><br></div></div>No
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| 10 | DVI_DATA7 [[Peripherals Summary#BSP| DSS_D7 McBSP1]] | LCD&nbsp;pixel data bit No | &nbsp; UART1_RX(mode=2)  GPIO_77(mode=4) No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 11 [[Peripherals Summary#BSP| DVI_DATA8 McBSP2]] | DSS_D8 No | LCD&nbsp;pixel data bit | GPIO_78(mode=4)<br> No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 12 [[Peripherals Summary#BSP| DVI_DATA9 McBSP3]] | DSS_D9 | LCD&nbsp;pixel data bit | GPIO_79Yes, not default configuration (mode=4disable UART2) | No | <div align="JUSTIFY">TFP410 '''(6)'''</div> <div align="JUSTIFY"><br></div>No
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| 13 | DVI_DATA10 [[Peripherals Summary#BSP| DSS_D10 McBSP4]] | LCD&nbsp;pixel data bit No | GPIO_80Yes, not default configuration (mode=4disable GPMCs)<br>  | <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 14 | DVI_DATA11 [[Peripherals Summary#BSP| DSS_D11 McBSP5]] | LCD&nbsp;pixel data bit No | GPIO_81Yes, not default configuration (mode=4disable GPIOs)<br>  | TFP410 '''(6)'''No
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| 15 [[Peripherals Summary#MMC| DVI_DATA12 MMC1]] | DSS_D12 No | LCD&nbsp;pixel data bit | GPIO_82(mode=4)<br> No | <div align="JUSTIFY"><br></div> <div align="JUSTIFY">TFP410 '''(6)''' </div> <div align="JUSTIFY"><br></div>No
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| 16 [[Peripherals Summary#MMC| DVI_DATA13 MMC2]] | DSS_D13 No | LCD&nbsp;pixel data bit | GPIO_83(mode=4)<br> No | <div align="JUSTIFY">TFP410 '''(6)'''</div>No
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| 17 [[Peripherals Summary#MMC| DVI_DATA14 MMC3]] | DSS_D14 No | LCD&nbsp;pixel data bit | GPIO_84(mode=4) No | TFP410 '''Yes, not default configuration (6disable GPIOs)'''
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| 18 [[Peripherals Summary#I2C| DVI_DATA15 I2C1]] | DSS_D15 No | LCD&nbsp;pixel data bit | GPIO_85(mode=4) No | TFP410 '''(6)'''No
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| 19 | DVI_DATA16 [[Peripherals Summary#I2C| DSS_D16 I2C2]] | LCD&nbsp;pixel data bit No | GPIO_86(mode=4)  | TFP410 '''(6)'''|-| 20 | DVI_DATA17 | DSS_D17 | LCD&nbsp;pixel data bit | GPIO_87(mode=4) No | TFP410 '''(6)'''No
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| 21<br> | DVI_DATA18 | DSS_D18 [[Peripherals Summary#I2C| LCD&nbsp;pixel data bit I2C3]] | DSS_D0 Yes, default configuration (mode=3)  MCSPI3_CLK(mode=2)  GPIO_88(mode=4J5) | No | TFP410 '''Yes, default configuration (6J1)'''
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| 22<br> | DVI_DATA19 | DSS_D19 | LCD&nbsp;pixel data bit | DSS_1 (mode=3)  MCSPI3_SIMO(mode=2)  GPIO_89(mode=4)  | TFP410 '''(6)'''|-| 23<br> | DVI_DATA20 | DSS_D20 | LCD&nbsp;pixel data bit | DSS_D2 (mode=3)  MCSPI3_SOMI(mode=2)  GPIO_90(mode=4)  | TFP410 '''(6)'''|-| 24<br> | DVI_DATA21 | DSS_D21 | LCD&nbsp;pixel data bit [[Peripherals Summary#I2C| DSS_3 (mode=3)  MCSPI3_CSO(mode=2)  GPIO_91(mode=4) I2C4]] | TFP410 '''(6)'''No |-| 25<br> | DVI_DATA22<br> | DSS_D22<br> | LCD&nbsp;pixel data bit | DSS_D4 (mode=3)  MCSPI3_CS1(mode=2)  GPIO_92(mode=4)  | TFP410 '''(6)'''|-| 26<br> | DVI_DATA23<br> | DSS_D23<br> | LCD&nbsp;pixel data bit | DSS_D5(mode=3)  GPIO_93(mode=4)  | TFP410 '''(6)'''|-| 27<br> | I2C3_SCL<br> | I2C3_SCL | I2C3 interface | GPIO_184(mode=4)  | TXS0102DCUR<br>|-| 28<br> | I2C3_SDA<br> | I2C3_SDA | I2C3 interface | GPIO_185(mode=4) No | TXS0102DCUR<br>No
|}
<br> '''(6)[[Category:''' TFP410Work_in_progress]][[Category: Converts DVI&nbsp;signal to HDMI. They share the same video signal.<br>  '''Under construction '''<br>Peripherals]]